Method of manufacturing a semiconductor device

Abstract

The present invention provides a semi-conductor manufacturing method. When memory cells of EEPROM and a capacitor element are formed on a same semiconductor substrate, the number of processes is prevented from increasing and a manufacturing cost is reduced. Furthermore, reliability of the capacitor element is improved, and characteristics of the memory cells, a MOS transistor, and so on are prevented from changing. A pair of left and right memory cells is formed in a memory cell formation region of a P-type silicon substrate, being symmetrical to each other with respect to a source region, and a capacitor element formed of a lower electrode, a capacitor insulation film, and an upper electrode is formed in a capacitor element formation region of the same P-type silicon substrate. The lower electrode of the capacitor element is formed by patterning a polysilicon film provided for forming control gates of the pair of memory cells.

Description

Technical field [0001] The present invention relates to a method of manufacturing a semiconductor device, and more particularly, to a method of manufacturing a semiconductor device including a nonvolatile semiconductor storage device and a capacitor element. Background technique [0002] In recent years, with the expansion of application fields such as mobile phones and digital cameras, electrically erasable programmable read-only memory devices (hereinafter referred to as EEPROM) have become widespread. [0003] EEPROM is based on whether a predetermined amount of electricity is accumulated on the floating gate (floating gate), stores 2 or more multi-value digital data, and detects the change in the conduction of the channel region corresponding to the amount of electricity, thereby enabling A device that reads digital data. EEPROM is classified into Split-Gate Type and Stacked-Gate Type. [0004] Picture 12 It is a cross-sectional view showing the structure of a memory cell o...