Semiconductor memory device having over-driving scheme
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[0030] Hereinafter, a preferred embodiment of the present invention will be described in detail with reference to the accompanying drawings.
[0031] In FIG. 4, there is provided a circuit diagram of a semiconductor memory device having an over-driving scheme in accordance with an embodiment of the present invention.
[0032] Referring to FIG. 4, the inventive semiconductor memory device includes a driver PM2 for driving a power supply line RTO of a bit-line sense amplifier with a voltage VN1 on a connection node N1 attached to a core power supply terminal Vcore, a control unit 40 for generating an over-driving control signal over_ctr by detecting a level of the voltage VN1 to that of a preset reference voltage Vref, and an over-driver PM1 for driving the connection node N1 with an external voltage VDD in response to the over-driving control signal over_ctr.
[0033] The control unit 40 contains a reference voltage generating sector 41 for producing the reference voltage Vref which is an ...
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