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Semiconductor memory device having over-driving scheme

Inactive Publication Date: 2005-01-20
SK HYNIX INC
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  • Summary
  • Abstract
  • Description
  • Claims
  • Application Information

AI Technical Summary

Benefits of technology

[0023] In accordance with the present invention, an over-driver controlled by sensing a voltage level compares a voltage level of a power line with that of a reference voltage (ascending limit of the power line) and is enabled during the voltage level of the power line is lower than that of the reference voltage. By driving the over-driver through the voltage level sensing, there are not required the repeated modifications and test processes for the metal layer. Furthermore, the effective over-driving can be performed without being influenced by the fluctuation of the manufacturing and driving environment.

Problems solved by technology

However, since the operating voltage is lowered according to a trend of the low power of the memory device, it is difficult to supply the sufficient current in a moment.
However, if the over-driving period is maintained constantly as shown above, there are required lots of modifications and repeated tests for a metal layer.
Therefore, if the driving time of the over-driver PM1 is short, it is difficult to increase the driving voltage of the bit-line sense amplifier to a sufficient voltage level, so that the driving time of the bit-line sense amplifier cannot be improved.
On the other hand, if the driving time is long, a level of the driving voltage of the bit-line sense amplifier is substantially increased, resulting in a bad effect on a high margin of data.
This leads high cost and time consumption.
Meanwhile, although the appropriate driving time was determined through the repeated modifications and tests, it is difficult to get an expected effect by the fluctuation of driving and manufacturing environment of the memory device.

Method used

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Embodiment Construction

[0030] Hereinafter, a preferred embodiment of the present invention will be described in detail with reference to the accompanying drawings.

[0031] In FIG. 4, there is provided a circuit diagram of a semiconductor memory device having an over-driving scheme in accordance with an embodiment of the present invention.

[0032] Referring to FIG. 4, the inventive semiconductor memory device includes a driver PM2 for driving a power supply line RTO of a bit-line sense amplifier with a voltage VN1 on a connection node N1 attached to a core power supply terminal Vcore, a control unit 40 for generating an over-driving control signal over_ctr by detecting a level of the voltage VN1 to that of a preset reference voltage Vref, and an over-driver PM1 for driving the connection node N1 with an external voltage VDD in response to the over-driving control signal over_ctr.

[0033] The control unit 40 contains a reference voltage generating sector 41 for producing the reference voltage Vref which is an ...

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Abstract

A semiconductor memory device has an over-driving scheme through which it is possible to perform effective over-driving regardless of the fluctuation of manufacturing and driving environment. The semiconductor memory device includes a first power supplying block for providing a normal voltage, a first driving block for driving a power line of a bit-line amplifier with a voltage on a connection node attached to the first power supplying block, a second driving block for driving the connection node with a voltage higher than the normal voltage, and a control block for generating an over-driving control signal which controls the second driving block by detecting a level of the voltage on the connection node to that of a preset reference voltage.

Description

FIELD OF THE INVENTION [0001] The present invention relates to semiconductor design technology; and, more particularly, to a semiconductor memory device having an over-driving scheme. DESCRIPTION OF RELATED ART [0002] As a low driving voltage is used to implement the low power of a memory device, various technical supplements have been used to improve the operation of a sense amplifier in the memory device such as a dynamic random access memory (DRAM). One of such supplements is an over-driving scheme of the sense-amplifier. [0003] In general, if data of a plurality of memory cells are transferred onto bit-lines, wherein the memory cells are connected to a certain word-line activated by a row address, a bit-line sense amplifier senses and amplifies a voltage difference between corresponding two bit-lines constructing a bit-line pair. [0004] In the above process, since thousands of bit-line sense amplifiers start to operate simultaneously, a driving time of the bit-line sense amplifi...

Claims

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Application Information

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IPC IPC(8): G11C7/00G11C7/06G11C11/4074G11C11/4091G11C17/00
CPCG11C7/06G11C2207/065G11C11/4091G11C11/4074
Inventor BAE, SEUNG-CHEOL
Owner SK HYNIX INC