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Optimizing accesses to read-mostly volatile variables

a volatile variable and access optimization technology, applied in the field of memory devices, can solve the problems of large overhead on the power platform, variable needs to be volatile, and the overhead of the memory fence affects the performance of the computer

Active Publication Date: 2020-01-23
INT BUSINESS MASCH CORP
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  • Summary
  • Abstract
  • Description
  • Claims
  • Application Information

AI Technical Summary

Benefits of technology

[0007]According to another aspect of the present invention, a computer program product is provided for eliminating a memory fence for reading a read-mostly volatile variable of a computer system. The read-mostly variable is read from more than written to. The computer program product includes a non-transitory computer readable storage medium having program instructions embodied therewith. The program instructions are executable by a computer to cause the computer to perform a method. The method includes writing data to the read-mostly volatile variable only during a Stop-The-World (STW) state of the computer system. The method further includes executing the memory fence in any mutator threads and thereafter exiting the STW state. The method also includes reading the read-mostly volatile variable by the mutator threads without executing the memory fence after the STW state.

Problems solved by technology

The preceding semantic causes a large overhead on a POWER platform because reading volatile variables requires a memory fence.
However, there is an Application Programming Interface (API) to change it, so the variable needs to be volatile.
Since the API to get the current security manager (System.getSecurityManager( )) is frequently called, computer performance is detrimentally affected by the overhead of the memory fence.
However, accessing such variables still need a memory barrier because they are volatile, even though their values are almost runtime constants.

Method used

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Examples

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Embodiment Construction

[0016]The present invention is directed to optimizing accesses to read-mostly volatile variables. As used herein, the term “read-mostly volatile variables” refers to volatile variables that are read from more than they are written to (reads from >writes to), hence the descriptor “read-mostly”.

[0017]In an embodiment, the present invention eliminates memory fences for reading read-mostly volatile variables by only modifying them during a Stop-The-World (STW) period of a stop-the-world garbage collector. A STW garbage collector completely halts execution of a computer program to run a collection cycle, thus guaranteeing that new objects are not allocated, and objects do not suddenly become unreachable while the STW garbage collector is running. An advantage of STW Garbage Collection (GC) is that it is both simpler to implement and faster than incremental garbage collection.

[0018]Hence, in an embodiment, the present invention lets STW GC update the read-mostly volatile variables, so tha...

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PUM

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Abstract

A computer-implemented method, computer program product, and computer processing system are provided for eliminating a memory fence for reading a read-mostly volatile variable of a computer system. The read-mostly variable is read from more than written to. The method includes writing data to the read-mostly volatile variable only during a Stop-The-World (STW) state of the computer system. The method further includes executing the memory fence in any mutator threads and thereafter exiting the STW state. The method also includes reading the read-mostly volatile variable by the mutator threads without executing the memory fence after the STW state.

Description

BACKGROUNDTechnical Field[0001]The present invention generally relates to memory devices, and more particularly to optimizing accesses to read-mostly volatile variables.Description of the Related Art[0002]A memory barrier, also known as a memory fence, is a type of barrier instruction that causes a processor or compiler to enforce an ordering constraint on memory operations issued before and after the barrier instruction. Essentially this means that operations issued prior to the memory barrier are guaranteed to be performed before operations issued after the barrier.[0003]In the Java® memory model, accesses to volatile variables are used as a kind of memory barrier that controls the visibility of data in memory. For example, if a thread-A writes data to a volatile variable v and another thread-B reads the latest value of the volatile variable (=1), a Java® semantic guarantees that thread-B reads the latest values of all data written to memory by thread-A before it writes the data t...

Claims

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Application Information

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Patent Type & Authority Applications(United States)
IPC IPC(8): G06F9/52G06F9/38G06F9/455G06F8/41G06F8/30
CPCG06F9/45533G06F9/3851G06F9/522G06F9/526G06F8/443G06F8/30G06F8/458G06F9/4552
Inventor OGATA, KAZUNORIHORII, HIROSHI
Owner INT BUSINESS MASCH CORP