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Data correcting system and its method

A data and complex number technology, which is applied in the system field of data recovery in serial transmission, and can solve problems such as clock skew.

Inactive Publication Date: 2007-12-26
REALTEK SEMICON CORP
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  • Summary
  • Abstract
  • Description
  • Claims
  • Application Information

AI Technical Summary

Problems solved by technology

[0003] The main purpose of the present invention is to provide a data recovery system and its method, which can solve the problem of clock skew in real time

Method used

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  • Data correcting system and its method
  • Data correcting system and its method

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Embodiment Construction

[0040] For a preferred embodiment of the data recovery system of the present invention, please refer to the block diagram shown in Figure 1, which includes an oversampling circuit (Over Sampler) 10, a phase detection circuit (Phase DetectCircuit) 20, a data selection A circuit (Data Picking Circuit) 30 , a data overlap / skip detection circuit (Dara Overlap / Skip Detect Circuit) 40 , and a data correction circuit (DataCorrection Circuit) 50 . Wherein, the over-sampling circuit 10 samples the input signal at a multiplied frequency, and outputs the over-sampled signal with multiple input signals as a unit. In this embodiment, the input signal is sampled at a tripled frequency and Taking a 10-bit input signal as an example, and after the oversampling signals are accumulated to 30, 30 oversampling signals are obtained, which are output to the phase detection circuit 20 and the data selection circuit 30 at the same time.

[0041] After receiving 30 oversampling signals, the phase dete...

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Abstract

The system includes an excessive sampling circuit, a phase detection circuit, a data selection circuit, a data superposition / slid over detection circuit and a data correction circuit. Excessive sampling is carried out for an input signal by the excessive sampling circuit in n time of frequency. With excessive sampled data being received, the phase detection circuit assorting last excessive sampled data carries out phase detection. Based on phase signal measured by the phase detection circuit, the data selection circuit divides the excessive sampled data into n group, and selects a group with m bit data as an output. Based on relationship between phase signal at this time and phase signal at last time, the data superposition / slid over detection circuit determines whether there is state of superposition / slid over happened. If 'yes', data will be corrected.

Description

technical field [0001] The present invention relates to a system and method for data recovery, especially a system and method for data recovery in serial transmission. Background technique [0002] In high-speed serial transmission, there will be a problem of clock skew when sampling serial data. The main reason is the recovered clock used to determine the phase of the sampling time. ) is out of phase with the sampled sequence data, a direct solution is to oversample the sampled sequence data (Over Sampling), and avoid possible clock skew by increasing the sampling frequency. In the case of U.S. Patent No. 5,905,769, a method based on oversampling is proposed to solve the problem of clock skew generated when sampling sequence data. It uses the phase signal of the previous data window to control the current sampling data window. However, when using the phase signal of the previous data window to correct the data of this sampling data window, there will be a problem that it c...

Claims

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Application Information

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Patent Type & Authority Patents(China)
IPC IPC(8): H03D3/02
Inventor 吕昭信张义树童旭荣谢光熙
Owner REALTEK SEMICON CORP