Media accessing control architecture of wireless communication systems supporting HARQ

Abstract

The present invention provides a media access control (MAC) architecture that can determine the transmission latency and block error rate condition requirements of a plurality of data streams, wherein each data stream has an associated priority order, and each data stream Both contain a plurality of data blocks. The MAC architecture specifies a scheduling entity for deciding when to transmit, and a hybrid automatic repeat request (H-ARQ) entity. The H-ARQ entity will determine whether the previous block has been successfully transmitted, and if not, it will request to retransmit the unsuccessfully transmitted data block. The scheduling of data blocks will take into account whether it is necessary to retransmit previously transmitted data blocks. The MAC architecture allows the scheduling entity to start new transmissions at any time, and to restart previous unsuccessful transmissions at any time.

Description

(1) Technical field [0001] The invention relates to a MAC architecture of a wireless communication system applying hybrid automatic repeat request (H-ARQ) technology. (2) Background technology [0002] figure 1 Shown is a block diagram of the UMTS Terrestrial Radio Access Network (UTRAN) MAC-hs layer architecture, figure 2 Shown is a block diagram of a user equipment (UE) MAC-hs architecture. figure 1 The UTRAN MAC-hs 30 includes a transport format combination (TFC) selection entity 31; a scheduling device 32; a plurality of H-ARQ processors 33a, 33b; and a data flow controller 34. [0003] UE MAC-hs 40 includes an H-ARQ processor 41 . will be referred to later figure 1 and 2 explain it in more detail. The H-ARQ processors 33a, 33b in the UTRAN MAC-hs 30 and the H-ARQ processor 41 in the UE MAC-hs 40 work together to process data blocks. [0004] The H-ARQ processors 33a, 33b in the UTRAN MAC-hs 30 are responsible for all work required for H-ARQ to generate transmiss...

AI Technical Summary

Problems solved by technology

Because H-ARQ processing must be considered before scheduling, higher priority data cannot be retransmitted in place of lower priority data

Therefore, when the data transmission with low priority is assigned to the H-ARQ processors 33a and 33b in advance, the transmission latency QoS specification for data transmission with high priority may not be met.

[0009] Because in the H-ARQ procedure, retransmissions are already combined with previous transmissions, subsequent retransmissions may not be successfully transmitted if the first transmission has been considerably corrupted

In this case, the data must be discarded because the scheduler 32 cannot restart the transmission in the same way as a new transmission

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