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An image compression circuit and control method

An image compression and circuit technology, applied in image communication, electrical components, pulse modulation TV signal transmission, etc.

Inactive Publication Date: 2009-11-18
VIMICRO CORP
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  • Summary
  • Abstract
  • Description
  • Claims
  • Application Information

AI Technical Summary

Problems solved by technology

This method can complete the required compression processing, but the problem is: on the one hand, the data valid signal has to work in all processing logics, and the data valid signal controls whether these logics operate, which brings additional area overhead; on the other hand, when the data valid signal is invalid, although the processor does not act, the clock signal will still pass through all the synchronization logic of the processor
According to the characteristics of CMOS devices, the chip will still have dynamic power consumption at this time, which is what designers do not want to see

Method used

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Embodiment Construction

[0015] In order to provide a low power consumption compression control circuit and method, the present invention proposes a novel clock structure for timing control. Next, the clock structure and its control method will be described in detail by taking JPEG compression as an example.

[0016] The process of JPEG compression can be roughly divided into two steps: First, after receiving the frame synchronization signal, a JPEG header file is generated, which includes the quantization table and Huffman table used in the current JPEG file ; After that, receive and compress the data output from the image output source. The entire compression process can be subdivided into figure 2 The timing process diagram shown.

[0017] figure 2 A schematic diagram showing the timing process and phase division of JPEG compression. As shown in the figure, in the JPEG compression process, the compression of each frame of image is a cycle, and it can be considered that each cycle starts in a ...

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Abstract

The present invention relates to an image compression circuit, comprising a compression function module and a gate control circuit; the input of the gate control circuit is a system clock, which outputs a gate control clock to the compression function module under the control of a gate control signal; The control signal is jointly controlled by the effective data signal output by the compression function module and the image source. The invention also provides a corresponding image compression control method. The circuit and method provided by the invention can effectively reduce system power consumption, and are simple and easy to implement.

Description

technical field [0001] The invention relates to an image compression circuit and a compression control method, in particular to a circuit and a method for controlling image compression with a clock. Background technique [0002] With the rapid development of science and technology, people's needs for various information are becoming more and more urgent. Among them, images, as an intuitive way of information, play an increasingly important role in daily life and are applied to various situation. But the image as the carrier of information brings a new problem, that is, the data volume of the image is too large. For example, for a 2 million pixel, yuv422 image, the data volume of an image is 4M bytes. For continuous video, If there are 30 frames per second, the data throughput in one second will reach 120M bytes, which is a very large number. In order to solve this problem, the image data must be compressed. In recent years, the image compression technology has developed gr...

Claims

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Application Information

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Patent Type & Authority Patents(China)
IPC IPC(8): H04N1/41H04N7/24
Inventor 刘健周芬
Owner VIMICRO CORP