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Method and apparatus for real time parallel encoding

By decomposing the video sequence into discrete coding units on a multi-processor platform and assigning them to multiple processors, combined with scene change detection and multi-thread scheduling, the problems of inconsistent encoding time and inaccurate rate control in real-time parallel video encoding are solved. problem, achieving efficient parallel video encoding.

Inactive Publication Date: 2008-01-16
INTERDIGITAL CE PATENT HOLDINGS SAS
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  • Summary
  • Abstract
  • Description
  • Claims
  • Application Information

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Problems solved by technology

Furthermore, it would be desirable and advantageous to have a method and apparatus for real-time parallel video encoding that addresses the additional problem of maintaining precise rate control with respect to various examples of parallel video encoders
Additionally, it would be desirable and advantageous to have a method and apparatus for real-time parallel video encoding that addresses another problem: real-time encoding on a multi-processor PC platform

Method used

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Embodiment Construction

[0017] The present invention focuses on a method and apparatus for real-time parallel video coding. Advantageously, the present invention provides real-time video encoding utilizing a standard multiprocessor desktop PC, although the claims presented here should not be construed as limited to a multiprocessor desktop PC environment. Although the present invention is described in the context of the JVT / H.264 / MPEG-4 AVC ("JVT") standard video coding environment, the principles of the present invention are also applicable for use with other video compression standards.

[0018] As mentioned above, real-time JVT encoding is computationally very demanding, requiring large amounts of memory and computing resources. Here, a method and apparatus are provided: its time-based group of pictures (GOP) parallelizes the JVT video encoding process performed on multiple processors to complete real-time encoding. The present invention combines techniques such as picture complexity analysis and...

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Abstract

There are provided apparatus and methods for parallelizing an encoding process across multiple processors. An apparatus includes a computing resource balancer (199) and a splitter (145). The computing resource balancer (199) is for assigning encoder instances to respective ones of the multiple processors based on at least one of thread affinity and process affinity. The splitter (145) is for temporally dividing an incoming video sequence into discrete GOPs such that each of the encoder instances is capable of encoding the incoming video sequence in parallel so that each of the discrete GOPs is encoded on a respective one of the multiple processors.

Description

[0001] Cross References to Related Applications [0002] This application claims the benefit of US Provisional Application Serial No. 60 / 645,179 (Attorney Docket No. PU0500013), filed January 19, 2005, and entitled "Method and Apparatus for Real-Time Parallel Video Coding." technical field [0003] The present invention relates generally to video encoders and decoders, and more particularly to a method and apparatus for real-time parallel video encoding. Background technique [0004] Real-time encoding of video data is computationally very demanding, requiring large amounts of memory and computing resources. [0005] Video encoding using parallel and distributed systems has been used in the past in MPEG-1 and MPEG-2 systems in some examples. One of the most famous examples is the Parallel Berkeley Coder Project. The purpose of this project is to speed up the video encoding process by parallelizing video sequences in the time direction. Parallel Berkeley encoder schemes ut...

Claims

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Application Information

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Patent Type & Authority Applications(China)
IPC IPC(8): H04N7/50
CPCH04N19/00781H04N7/26079H04N7/26702H04N7/26265H04N19/00272H04N7/26196H04N7/26755H04N19/00103H04N19/002H04N7/50H04N19/0009H04N19/00521H04N7/2626H04N19/00284H04N7/2609H04N19/00478H04N19/124H04N19/127H04N19/154H04N19/174H04N19/177H04N19/42H04N19/436H04N19/61
Owner INTERDIGITAL CE PATENT HOLDINGS SAS