Micro computer device

Abstract

The invention provides a microcomputer which can satisfy the preparation time of microprocessor to prevent the processing speed from descending when the readout delay time from storage is increased due to lower action clock frequency ratio. When the control signal output from universal port controlls gate circuit element (9), a first action mode is selected. The first action mode is interlocking the signal state of read signal terminal( / RD) of storage (2A) and the signal state of read signal terminal( / RD) of microprocessor (1), changing into starting state and not enabling state. When the control signal output from universal port controlls gate circuit element (9), a second action mode is selected. The said second action mode is the signal state of read signal terminal( / RD) of storage (2A) not limited by the signal state of read signal terminal( / RD) of microprocessor (1), compulsorily fixed to be enabling state.

Description

technical field [0001] The present invention relates to a microcomputer device that needs to extend the access time by using a soft wait function according to the clock speed from the relationship between the setup time of the microprocessor and the read delay time of the memory. Background technique [0002] As known, such a microcomputer device includes a microprocessor and a memory. [0003] The microprocessor has: an address signal terminal column (A) for outputting address signals, a data signal terminal column (D) for inputting and outputting data signals, a chip selection signal terminal ( / CS) for outputting chip selection signals, A read signal terminal ( / RD) for outputting a read signal, and a write signal terminal ( / WR) for outputting a write signal. [0004] Similarly, the memory has: an address signal terminal column (A) for inputting an address signal, a data signal terminal column (D) for inputting and outputting a data signal, a chip selection signal terminal...

AI Technical Summary

Problems solved by technology

[0021] However, in such a conventional microcomputer, there is a problem that the memory in which the chip select signal terminal ( / CS) and the read signal terminal ( / RD) are connected to the ground (GND: enable state) is limited to Read-only memory, so although it is possible to read / write a specific address space, the read speed cannot be increased, and the degree of design freedom is also very limited

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