Etching method for non-volatile memory body

Abstract

The invention provides an etching method of non volatile memory bank. The method is that for example, a substrate is provided, and a memory unit, a first dielectric layer and an isolation structure are formed on the substrate. A control grid and a floating grid are formed on the memory unit. A memory unit contact window is formed on the memory unit, a substrate contact window is formed in the memory unit and the isolation structure, and a second dielectric layer and a notch are formed on the substrate. Chemical gas is used to reinforce the surface of the second dielectric layer to lead the surface structure of the second dielectric layer on the memory unit to be provided with stronger surface structure than the second dielectric layer on the substrate contact window. The different intensity of the surface structures of the second dielectric layer is utilized to lead the speed formed by the space of a memory unit contact window lead to be equivalent to the speed formed by the space of a substrate contact window lead.

Description

technical field [0001] The invention relates to a manufacturing method of a semiconductor element, and in particular relates to an etching method of a non-volatile storage body. Background technique [0002] Figure 1A to Figure 1E It is a cross-sectional view illustrating an etching method of a non-volatile storage body according to an embodiment of the present invention. Please refer to Figure 1A The method for manufacturing the non-volatile storage body is, for example, first to provide a substrate 100 on which the memory unit 105 , the first dielectric layer 110 and the isolation structure 130 have been formed. Wherein, the substrate 100 is, for example, a silicon substrate. A control gate 160 and a floating gate 140 have been formed on the memory unit 105. The material for the control gate 160 includes silicon oxide, the material for the floating gate 140 includes polysilicon and doped polysilicon, and the control gate 160 and the floating gate The forming method of...

AI Technical Summary

Problems solved by technology

Although the memory cell contact window wire space 172 is etched just to the memory cell contact window 170, often the substrate contact window wire space 182 is not etched enough and does not reach the substrate contact window 180 because the etching rate is not properly matched.

[0008] Because the etching rate of the prior art is not properly matched, it often causes the memory cell contact window wire space 171 to be over-etched, etch through the control gate 160, or the substrate contact window wire space 182 is under-etched and does not reach the substrate contact window 180.

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