Sdram convolutional interleaver with two paths
A technology of interleaver and path, applied in the field of data communication, to achieve the effect of optimizing access time, increasing speed, and optimizing SDRAM access
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[0147] According to the present invention, in general, two (2) path interleavers are built with multiple channels, and each channel can go through short path or long path due to channel classification in SRAM and perform at high speed. Furthermore, interleaving writes to SRAM allows the SRAM to be smaller, which is beneficial when implemented in an FPGA. Additionally, the writes are packed to support many interleaver modes for small SRAMs. The technique disclosed herein supports dual SDRAM with two interleaver lengths without causing significant slowdown.
[0148] The present invention makes it possible to implement an SDRAM convolutional interleaver in two paths (A and B) by using SDRAM, FPGA logic, and FPGA SRAM.
[0149] The problem solved by the present invention is that burst writes to SDRAM two-path interleaver will reach a maximum (limited thereto) at a throughput of 10M symbols / sec and require higher symbol rates (e.g. 110M symbols / sec ).
[0150] According to the p...
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