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Time synchronization method and system

A time synchronization and time technology, which is applied in time division multiplexing systems, transmission systems, synchronization devices, etc., can solve the problems of time synchronization error, time asynchrony between master and slave, and phase asymmetry during synchronization, so as to solve the problem of delay. asymmetrical effect

Active Publication Date: 2015-01-28
ZTE CORP
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Problems solved by technology

[0013] The existing IEEE1588-2008 standard does not clearly describe whether the rates of the master and slave physical connection ports match. If the rates of the master and slave physical connection ports are inconsistent, the delay time from the master to the slave will be different from that from the slave to the master, resulting in Time synchronization error, resulting in phase asymmetry during synchronization
[0014] The technical problem to be solved by the present invention proposes a time synchronization method and system to solve the problem of time asynchrony between the master and the slave due to the inconsistency of the physical rate of the time stamp interface between the master and the slave

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Embodiment Construction

[0046] First, analyze the problems in the prior art:

[0047] Such as figure 2 In the networking mode shown, if the rate of the physical interface between the master device and the slave device does not match, it will cause asymmetric delay. for figure 2 , we analyze under the following conditions:

[0048] 1. Line transmission delays in both directions are equal;

[0049] 2. The unknown network (cloud network) in the middle has the same delay;

[0050] 3. Timestamp between the frame preamble and the destination MAC;

[0051] In order to analyze the problem, the following assumptions are made at the same time:

[0052] (1) UDP / IPv4 / Ethernet header is adopted, including the check digit, and the entire packet length is 86 bits;

[0053] (2) The message frame is completely read into the cache by the switch and then forwarded;

[0054] (3) The frame leader is 8 bits;

[0055] (4) The check digit is 4 bits;

[0056] (5) The rate of the physical network port of the master...

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Abstract

The present invention discloses a method and system for time synchronization. The method includes: a master device notifies its own physical network port rate information to a slave device; after obtaining the physical network port rate of the master device, the slave device compares the physical network port rate with its own physical network port rate; if they are different, the slave device performs compensation for an average line transmission delay obtained by calculation, otherwise, the slave device does not perform compensation. By applying the technical solutions of the present invention, the problem that asymmetrical delays caused by inconsistent master and slave physical network port rates result in asynchronous phases can be solved in a delay request response mechanism.

Description

technical field [0001] The present invention relates to the field of clock synchronization, in particular to a time synchronization method and system. Background technique [0002] In the communication system, with the continuous development of data services and multimedia services, IP-based packet network transmission of data has become the mainstream of development. At this time, on the one hand, new services and new applications put forward higher requirements on the synchronization performance of the network; on the other hand, the compatibility of traditional TDM (Time Division Multiplexing) services requires the packet network to provide high Synchronization and timing performance. [0003] IEEE1588 PTP (Precision Time Synchronization Protocol, Precision Clock Synchronization Protocol) is a time synchronization mechanism stipulated to overcome the lack of real-time performance of Ethernet. For time synchronization, an accurate time source periodically corrects and sy...

Claims

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Application Information

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Patent Type & Authority Patents(China)
IPC IPC(8): H04L7/00H04L29/06
CPCH04J3/0667
Inventor 罗丽彭勇傅小明唐雄
Owner ZTE CORP
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