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Insertion of operation-and-indicate instructions for optimized simd code

A technology for indicating instructions and codes, applied in the field of improved data processing devices, can solve problems such as unavailability and inability to generate exception sets

Active Publication Date: 2012-05-23
IBM CORP
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  • Summary
  • Abstract
  • Description
  • Claims
  • Application Information

AI Technical Summary

Problems solved by technology

However, the knowledge of whether the result will be used is not available to the QVFRE instruction, therefore, it cannot generate the correct set of exceptions

Method used

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  • Insertion of operation-and-indicate instructions for optimized simd code
  • Insertion of operation-and-indicate instructions for optimized simd code
  • Insertion of operation-and-indicate instructions for optimized simd code

Examples

Experimental program
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Embodiment Construction

[0050] Example embodiments provide mechanisms for tracking floating-point exceptions and storage-based exception indications on a path within data. Utilizing the mechanisms of the example implementations, special values ​​are stored in vector elements when exceptional conditions are encountered, such as during speculative execution of instructions or the like. Speculative execution of instructions is part of a thread of execution and is an optimization technique with which if the results of a thread are needed during code execution, that is, if the thread is transitioned from a speculative state to an Predictive state, the earlier execution of threads whose results may or may not be needed later enables greater performance. The example implementation's special value indicates an exception condition, but does not invoke the corresponding exception handling machinery. These special values ​​are propagated through the execution of the computer program, and through the processo...

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Abstract

Mechanisms are provided for inserting indicated instructions for tracking and indicating exceptions in the execution of vectorized code. A portion of first code (620) is received for compilation. The portion of first code (620) is analyzed to identify non-speculative instructions performing designated non-speculative operations in the first code (620) that are candidates for replacement by replacement operation-and-indicate instructions that perform the designated non-speculative operations and further perform an indication operation for indicating any exception conditions corresponding to special exception values (840) present in vector register inputs to the replacement operation-and-indicate instructions (1020). The replacement is performed (1080) and second code (630) is generated based on the replacement of the at least one non-speculative instruction. The data processing system (100) executing the compiled code (630) is configured to store special exception values (840) in vector output registers (1130), in response to a speculative instruction generating an exception condition, without initiating exception handling.

Description

[0001] This invention was made with United States Government support under Contract No. B554331 awarded by the Department of Energy. The US Government has certain rights in this invention. technical field [0002] The present application relates generally to an improved data processing apparatus and method, and more particularly to an operation-and-direction instruction mechanism for inserting Single Instruction Multiple Data (SIMD) code for optimization. Background technique [0003] Multimedia Extensions (MME) have become one of the most popular additions to general purpose microprocessors. Existing multimedia extensions can be characterized as Single Instruction Multiple Data (SIMD) path units supporting packed fixed-length vectors. Traditional programming models for multimedia extensions have been explicitly vectorized programming through the use of (inline) assembly or intrinsic functions embedded in high-level programming languages. Explicit vector programming is tim...

Claims

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Application Information

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IPC IPC(8): G06F9/45
CPCG06F9/3865G06F9/30043G06F8/451G06F9/3887G06F9/30036G06F9/30007G06F9/30021G06F8/4441
Inventor A·艾兴贝格尔A·加拉M·格施温德
Owner IBM CORP
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