Deviation reducing method and deviation reducer for CCD (Charge Coupled Device) signal processing circuit
A signal processing circuit and channel deviation technology, which is applied in the direction of TV, electrical components, color TV, etc., can solve the problems of many actual gain codes and adjustable gain codes, and achieve simple and reliable effects of saving hardware resources and reducing
Active Publication Date: 2014-11-19
BEIJING RES INST OF SPATIAL MECHANICAL & ELECTRICAL TECH
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[0003] Most of the existing methods are to calculate the actual gain code corresponding to the theoretical gain code of each channel through ground calibration, and send the actual gain code of each channel in actual application, but because there are many adjustable gain codes in each channel, it is necessary to The calculated actual gain codes are more
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[0017] like figure 1 As shown, the CCD signal processing circuit channel deviation reduction method of the present invention, the steps are as follows:
[0018] (1) Make the CCD device image a uniform parallel light source, and obtain the digital signals of each tap of the CCD under the light source through operations such as correlated double sampling, analog-to-digital conversion, and data synthesis of the CCD signal processing circuit. Since the incident light source is a uniform parallel light source , so the obtained digital signal DN value (gray value) of each tap of the CCD should be the same, but due to the existence of the channel deviation, it is reflected in the obtained digital signal DN value, thus calculating the channel deviation of each channel of the CCD signal processing circuit , storing the channel deviation into the channel deviation data memory;
[0019] (2) Receive the external serial input three-wire serial gain control signal: clock signal, data signa...
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The invention discloses a deviation reducing method and a deviation reducer for a CCD (Charge Coupled Device) signal processing circuit. The method comprises the following steps of: receiving an external serial input signal, converting into a parallel signal, and decoding according to a given format to obtain a channel name and a corresponding gain code; determining a corresponding channel deviation data storage address according to the channel name and reading corresponding channel deviation data from a channel deviation data storage; and adding the gain code of the same channel name with the channel deviation data, comparing with a maximum gain value of a gain register in an AD (Analog to Digital) converter, and setting the gain of the AD converter by using a larger value to reduce the deviation of a digital signal output by a channel. The deviation reducer comprises the channel deviation data storage, a channel deviation processor and an AD conversion module, wherein the channel deviation processor comprises a read-out address generator, a register, a serial data receiver, an interpreter, an adder, a comparator and a data serial transmitter; and the AD conversion module comprises a plurality of AD converters.
Description
technical field [0001] The invention relates to a method for reducing channel deviation of a CCD signal processing circuit and a corresponding deviation reducing device. Background technique [0002] In the CCD signal processing circuit, it is usually necessary to perform correlation double sampling and analog-to-digital conversion on the received CCD signal, and perform gain amplification, and then send the obtained digital signal to the processor for processing and output. However, since the CCD signal is multi-tap output, there are multiple channels in the CCD signal processing circuit to process the signals of different taps. Due to the reasons of CCD devices and circuits, even for the same analog signal, the digital signals output by different channels are usually different, that is, there is channel deviation. Due to the existence of the channel deviation, the output image of the original continuous image after multi-channel signal synthesis has a step jump between ch...
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IPC IPC(8): H03M9/00H04N5/341
Inventor 牟研娜王鹏尹娜
Owner BEIJING RES INST OF SPATIAL MECHANICAL & ELECTRICAL TECH