Configurable D latch for chaos computing

A latch and chaotic technology, applied in the direction of electrical components, logic circuits, pulse technology, etc., can solve problems that cannot be rewired or configured, functions cannot be changed, and circuit structure cannot be rewired or configured.
CN102780485AInactive Publication Date: 2012-11-14SOUTH CHINA UNIV OF TECH
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Patent Information

Authority / Receiving Office
CN · China
Current Assignee / Owner
SOUTH CHINA UNIV OF TECH
Publication Date
2012-11-14
Estimated Expiration
Not applicable · inactive patent

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Abstract

The invention discloses a configurable D latch for chaos computing. The configurable D latch for the chaos computing comprises an alternative data strobe device and a configurable logic gate. According to the alternative data strobe device, input signals are a first input signal and a feedback signal respectively, a control signal is a strobe signal, and an output signal is a signal after strobe. According to the configurable logic gate, input signals are a signal after strobe and a second input signal, control signals are a control signal Ctra and a control signal Ctrb respectively, and output signals are an output signal Vout and an out signal NVout. The output signal Vout of the configurable logic gate is the input signal, namely the feedback signal of the alternative data strobe device. By configuration of the two control signals and the other input signal of the configurable logic gate, the D latch can achieve different functions so as to achieve dynamic computing.
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Description

Technical field

[0001] The invention relates to the fields of electronic technology and dynamic calculations, and in particular to a configurable D latch for chaotic calculations. Background technique

[0002] The latch is a memory cell circuit sensitive to the pulse level. It can change its state under the action of a specific input pulse level. Usually, the pulse level has only two states: high and low. When the pulse level is high and effective, if the input pulse level is high, then the output of the latch will follow the input of the latch and change, if the input pulse level is low, then the output of the latch Will remain the same. On the contrary, when the pulse level is active low, if the input pulse level is low, then the output of the latch will follow the input of the latch and change, if the input pulse level is high, then the latch The output will remain unchanged.

[0003] The latch is the main module of the arithmetic unit in the microprocessor, and the D latch ...

Claims

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