Alignment control method for multiple layers of PCBs

A technology of PCB circuit board and control method, applied in the direction of multi-layer circuit manufacturing, etc., can solve problems such as large cumulative error, and achieve the effects of high alignment accuracy, improved alignment, and wide application range

Inactive Publication Date: 2012-12-26
JIANGSU PROVISION ELECTRONICS CO LTD
View PDF5 Cites 12 Cited by
  • Summary
  • Abstract
  • Description
  • Claims
  • Application Information

AI Technical Summary

Problems solved by technology

At present, the alignment control of multi-layer PCB circuit boards generally adopts the X-RAY shooting method to mark the alignment

Method used

the structure of the environmentally friendly knitted fabric provided by the present invention; figure 2 Flow chart of the yarn wrapping machine for environmentally friendly knitted fabrics and storage devices; image 3 Is the parameter map of the yarn covering machine
View more

Examples

Experimental program
Comparison scheme
Effect test

Embodiment Construction

[0011] A method for controlling the alignment of a multilayer PCB circuit board, comprising the following steps: 1. making graphics and hole position targets on each layer of PCB circuit board; Identify and shoot the above-mentioned hole target; ③ Align and position the above-mentioned two-layer or multi-layer PCB circuit board through the hole target. In this way, the cumulative error caused by multiple alignments can be reduced, thereby achieving the purpose of improving alignment.

[0012] The above holes are riveting positioning holes, forming positioning holes or non-metallized functional holes. For special non-metallized functional holes, it can avoid problems such as ink entry holes and sundries plugging holes caused by PCB circuit board graphics production.

the structure of the environmentally friendly knitted fabric provided by the present invention; figure 2 Flow chart of the yarn wrapping machine for environmentally friendly knitted fabrics and storage devices; image 3 Is the parameter map of the yarn covering machine
Login to view more

PUM

No PUM Login to view more

Abstract

The invention discloses an alignment control method for multiple layers of PCBs (Printed Circuit Boards). The method comprises the steps as follows: (1) making drawings and hole position targets on each PCB respectively; (2) recognizing the hole position targets with a CCD (Charge Coupled Device) target shooting machine and targeting on the drawn PCBs; and (3) aligning and positioning the two or more layers of PCBs through the hole position targets. The method provided by the invention is not only simple, but also can realize high-precision interlayer alignment so as to increase production efficiency.

Description

technical field [0001] The invention relates to a method for controlling the alignment degree of a multilayer PCB circuit board. Background technique [0002] In order to comply with the development trend of multi-function, miniaturization and light weight of electronic products, the requirements of the next generation electronic system for PCB are high density, high integration, encapsulation, miniaturization and multi-layer. Alignment technology and high-density interconnection technology have become urgent problems to be solved. At present, the alignment control of multi-layer PCB circuit boards generally adopts the X-RAY shooting method to mark the alignment holes before the PCB pattern is produced, which causes the cumulative error caused by multiple alignments to be particularly large. Contents of the invention [0003] In order to overcome the above defects, the present invention provides a method for controlling the alignment of multilayer PCB circuit boards. The ...

Claims

the structure of the environmentally friendly knitted fabric provided by the present invention; figure 2 Flow chart of the yarn wrapping machine for environmentally friendly knitted fabrics and storage devices; image 3 Is the parameter map of the yarn covering machine
Login to view more

Application Information

Patent Timeline
no application Login to view more
IPC IPC(8): H05K3/46
Inventor 马洪伟
Owner JIANGSU PROVISION ELECTRONICS CO LTD
Who we serve
  • R&D Engineer
  • R&D Manager
  • IP Professional
Why Eureka
  • Industry Leading Data Capabilities
  • Powerful AI technology
  • Patent DNA Extraction
Social media
Try Eureka
PatSnap group products

Browse by: Latest US Patents, China's latest patents, Technical Efficacy Thesaurus, Application Domain, Technology Topic.

© 2024 PatSnap. All rights reserved.Legal|Privacy policy|Modern Slavery Act Transparency Statement|Sitemap