Resettable scan-structured flip-flops resistant to single-event upsets and single-event transients

A single-event transient, anti-single-event technology, applied in pulse generation, electrical components, generating electrical pulses, etc., can solve the problems of anti-single-event flip capability and low anti-single-event transient.
CN103825577BActive Publication Date: 2016-08-24NAT UNIV OF DEFENSE TECH

Patent Information

Authority / Receiving Office
CN · China
Patent Type
Patents(China)
Current Assignee / Owner
NAT UNIV OF DEFENSE TECH
Publication Date
2016-08-24

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Abstract

The invention discloses an anti-single event upset and anti-single event transient resettable scanning structure D trigger, for the purpose of solving the problems of not high anti-single event upset capability and not high anti-single event transient capability of a conventional resettable scanning structure D trigger. The resettable scanning structure D trigger provided by the invention is composed of a buffer circuit, a scanning control buffer circuit, a reset buffer circuit, a clock circuit, a master latch register, a slave latch register and an output buffer circuit. The master latch register and the slave latch register are latch registers with redundancy reinforcement. The master latch register and the slave latch register are connected in series and are both connected with the clock circuit and the reset buffer circuit. The master latch register is also connected with the buffer circuit and the scanning control buffer circuit. The slave latch register is also connected with the output buffer circuit. According to the invention, mutually redundant C<2>MOS circuits are separated from the master latch register and the slave latch register so that the anti-single event upset capability is improved. The buffer circuit enables no errors to be generated under a single event transient pulse which lasts for quite a long time. A dual-mode redundancy pathway further enhances the anti-single event upset capability.
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Description

technical field

[0001] The present invention relates to a master-slave D flip-flop with a reset structure and a scan structure, in particular to a resettable scan against single event upset (Single Event Upset, SEU) and single event transient (Single Event Transient, SET). Structural D flip flops. Background technique

[0002] There are a large number of high-energy particles (protons, electrons, heavy ions, etc.) in the universe. After the sequential circuit in the integrated circuit is bombarded by these high-energy particles, the state it maintains may be reversed. This effect is called the single event reversal effect. The higher the LET (Linear Energy Transfer) value of the bombardment IC, the easier it is to produce single event upset effects. After the combined circuit in the integrated circuit is bombarded by these high-energy particles, it is possible to generate a transient electric pulse. This effect is called the single event transient effect. The higher the LET...

Claims

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