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Method and apparatus for transmission line in package

A package and transmission line technology, applied in the field of transmission lines, can solve problems such as difficulty in designing transmission lines, degradation of RF device performance, and large metal layer capacitance

Active Publication Date: 2016-12-28
TAIWAN SEMICON MFG CO LTD
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  • Summary
  • Abstract
  • Description
  • Claims
  • Application Information

AI Technical Summary

Problems solved by technology

[0006] As semiconductor technology continues to develop and chip package sizes shrink, such as by using 3DIC die stacks, the distance between metal layers in conductive CMOS (Complementary Metal Oxide Semiconductor) structures becomes smaller, resulting in The capacitance of the increasing and degraded RF device performance
Also, due to shrinking die packages in advanced semiconductor manufacturing technology nodes like 20nm process, it is becoming more and more difficult to design and manufacture on-chip transmission lines in a single chip or die

Method used

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  • Method and apparatus for transmission line in package
  • Method and apparatus for transmission line in package
  • Method and apparatus for transmission line in package

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Embodiment Construction

[0029] The making and using of embodiments of the invention are discussed in detail below. It should be appreciated, however, that the present invention provides many applicable concepts that can be embodied in a wide variety of specific contexts. The specific embodiments discussed are merely illustrative of specific ways to make and use the invention, and do not limit the scope of the invention.

[0030] As will be exemplified below, methods and apparatus for forming a semiconductor device package with transmission lines using a microbump layer are disclosed. The microbump layer may include microbumps and microbump lines formed between the top die and the bottom die or between the die and the interposer. Signal transmission lines can be formed using micro-bump lines over the device. The ground plane can be formed using a redistribution layer (RDL) within the device or using other microbump lines. The ground plane formed by the RDL may include open slots. There may be RDLs...

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Abstract

A method and apparatus for forming a semiconductor device package with transmission lines using a microbump layer is disclosed. The microbump layer may include microbumps and microbump lines formed between the top device and the bottom device. Signal transmission lines can be formed using micro-bump lines above the bottom device. The ground plane can be formed using a redistribution layer (RDL) within the bottom device or using other micro-bump lines. The ground plane formed by the RDL may include open slots. There may be RDLs on the bottom and top devices above and below the micro-bump lines to form part of the ground plane.

Description

technical field [0001] The present invention relates to methods and apparatus for transmission lines in packages. Background technique [0002] Electronic devices can be divided into simple hierarchies consisting of devices such as integrated circuit (IC) chips, packages, printed circuit boards (PCBs), and systems. The package is the interface between the IC chip and the PCB. IC dies are made of semiconductor materials such as silicon. The die is then mounted using wire bonding (WB), tape automated bonding (TAB), or flip chip (FC) bump-mounting techniques on devices such as quad flat pack (QFP), pin grid array (PGA), ball grid Array (BGA), three-dimensional integrated circuit (3DIC), wafer-level package (WLP) or package-on-package (PoP) devices in semiconductor packages. The packaged die is then attached directly to the PCB or to another substrate as a secondary package. [0003] Because the 3DIC technology utilizes the vertical size of the chip to reduce the interconnec...

Claims

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Application Information

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Patent Type & Authority Patents(China)
IPC IPC(8): H01L23/528H01L21/768
CPCH01L23/49811H01L23/49822H01L23/5225H01L23/525H01L23/53223H01L23/53238H01L23/53257H01L23/5329H01L23/66H01L2223/6627H01L2924/0002H01P5/028Y10T29/49124H01L2924/0001H01L23/538H01L21/563H01L24/11H01L24/16H01L24/81H01L25/0657H01L2924/01028H01L2924/01029H01L2924/014H01L2924/00
Inventor 林佑霖颜孝璁郭晋玮郑敏祺
Owner TAIWAN SEMICON MFG CO LTD