Unlock instant, AI-driven research and patent intelligence for your innovation.

Processing method of laminated wafer

A processing method and wafer technology, applied in metal processing equipment, manufacturing tools, laser welding equipment, etc., can solve the problems of no chip, external force applied to the boundary part, and the boundary part cannot be divided, etc.

Active Publication Date: 2018-07-31
DISCO CORP
View PDF13 Cites 0 Cited by
  • Summary
  • Abstract
  • Description
  • Claims
  • Application Information

AI Technical Summary

Problems solved by technology

[0012] However, no chip is placed on the remaining area of ​​the outer periphery of the wafer-like interposer, and the interposer cannot be attached to the adhesive sheet through the chip.
[0013] Therefore, in the division method disclosed in Patent Document 4, which expands the adhesive sheet using the expansion device and applies external force to the wafer-shaped interposer, since the remaining area of ​​the outer periphery is not fixed to the adhesive sheet by sticking, it is impossible to arrange External force is applied to the boundary portion between the chip area and the remaining peripheral area, and there is a problem that division cannot be performed on this boundary portion

Method used

the structure of the environmentally friendly knitted fabric provided by the present invention; figure 2 Flow chart of the yarn wrapping machine for environmentally friendly knitted fabrics and storage devices; image 3 Is the parameter map of the yarn covering machine
View more

Image

Smart Image Click on the blue labels to locate them in the text.
Viewing Examples
Smart Image
  • Processing method of laminated wafer
  • Processing method of laminated wafer
  • Processing method of laminated wafer

Examples

Experimental program
Comparison scheme
Effect test

Embodiment Construction

[0042] Hereinafter, embodiments of the present invention will be described in detail with reference to the drawings. figure 1 It is a perspective view showing the laminated wafer 1 as an example of the processing object of the present invention.

[0043] The laminated wafer 1 is configured such that a plurality of chips 12 and 12 are arranged horizontally and vertically on a surface 11a of an interposer 11 of a wafer formed as a thin disc, and are arranged at predetermined positions.

[0044] The planned division lines 13 and 13 are defined in the area between the adjacent chips 12 and 12, and the division is planned to be performed along the planned division lines 13 and 13.

[0045] On the surface 11 a of the interposer 11, the area where the chip 12 is arranged is the chip area 14, and the outer periphery of the chip area 14 is the outer periphery remaining area 16.

[0046] The chip area 14 is configured to be thicker than the outer periphery remaining area 16 by the thickness of t...

the structure of the environmentally friendly knitted fabric provided by the present invention; figure 2 Flow chart of the yarn wrapping machine for environmentally friendly knitted fabrics and storage devices; image 3 Is the parameter map of the yarn covering machine
Login to View More

PUM

No PUM Login to View More

Abstract

The invention provides a processing method of a stacked wafer; in the stacked wafer with a chip stacked on the wafer, when the chip is bonded on a side of a bonding sheet, the wafer can still be cut into chips; the method is characterized in that a fixing step before a cutting step is arranged as below: in an area corresponding to a periphery remained area, a fixing agent is arranged between the bonding sheet and a surface of the wafer, so the periphery remained area of the wafer can be fixed on the bonding sheet.

Description

Technical field [0001] The present invention relates to a method for processing a laminated wafer in which a plurality of chips are arranged on the wafer. Background technique [0002] In the past, as one of the methods for integrating a plurality of semiconductor devices into one package, three-dimensional mounting has been known. This three-dimensional mounting is a method of stacking a plurality of semiconductor device chips in a three-dimensional direction and mounting them. One of the three-dimensional stacking technologies includes a CoW (Chip on wafer) method (for example, refer to Patent Literature 1.). [0003] In such three-dimensional mounting, a laminated wafer in which chips are laminated on the wafer is formed, and the laminated wafer is divided into individual chips to form a laminated chip in a state where the chips are laminated on the chip. [0004] As a method of dividing laminated wafers, as disclosed in Patent Document 2, a method of cutting with a cutting devi...

Claims

the structure of the environmentally friendly knitted fabric provided by the present invention; figure 2 Flow chart of the yarn wrapping machine for environmentally friendly knitted fabrics and storage devices; image 3 Is the parameter map of the yarn covering machine
Login to View More

Application Information

Patent Timeline
no application Login to View More
Patent Type & Authority Patents(China)
IPC IPC(8): H01L21/78H01L21/683B23K26/38
CPCB23K26/38H01L21/6836H01L21/78
Inventor 荒井一尚
Owner DISCO CORP