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A message buffer management method and device

A message cache and management method technology, applied in the field of message cache management methods and devices, can solve problems such as performance bottlenecks, increase usage complexity, increase user memory consumption, etc., to avoid backup, improve packet throughput performance, avoid The effect of data movement

Active Publication Date: 2017-08-29
DATANG MOBILE COMM EQUIP CO LTD
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  • Summary
  • Abstract
  • Description
  • Claims
  • Application Information

AI Technical Summary

Problems solved by technology

[0009] The technical problem to be solved by the present invention is: in the prior art, when encapsulating and decapsulating the data packet header in the cross-protocol layer / cross-module message transmission, it is necessary to apply for a new cache and move the data from the old cache to the new one. In the cache, and then release the old cache, this series of operations causes a performance bottleneck problem; and when the existing technology releases the message cache, it is required that the cache address to be released must be the original cache address obtained at the time of application, which leads to When users of the cache access or process data in the cache, they need to back up the original cache address, which not only increases the memory consumption of the user, but also increases the complexity of the use

Method used

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  • A message buffer management method and device

Examples

Experimental program
Comparison scheme
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Embodiment 1

[0037] Embodiment 1 of the present invention provides a message cache management method, such as image 3 shown, including the following steps:

[0038] S101: Create a cache status table for managing cache block status;

[0039] S102: When a packet cache request is received, search for a free cache block according to the cache state table;

[0040] S103: After reserving a header space of a preset length at the first address of the free cache block, the current memory address is used as the first address of the data to store the message for sending the message cache request;

[0041] S104: Adjust the address offset of the current data pointer in the message header or the current available header space according to the operation of the message header data during message processing; where the available header space actually refers to the first address of the cache block The space between the head address of the data and the first address of the data, as the data is encapsulated...

Embodiment 2

[0072] Embodiment 2 of the present invention describes a message buffer management method of the present invention through the specific implementation steps of the message sending and receiving, processing and transmission process, as shown in Figure 8 shown, including:

[0073] Step 1: By analyzing the functions of each module of the whole system, pre-calculate the sum of the maximum stripped header lengths (assumed to be L1 bytes) in the Ingress direction of the messages flowing through the system, and the maximum encapsulation in the Ingress direction The sum of the length of the message header (assumed to be L2 bytes); in order to avoid data movement, it is necessary to reserve header space for the change of the data header length. Here, it is assumed that the ingress message is at the head of the cache when it is first stored in the cache To reserve the header space of PreHdrRoom bytes, the calculation rules of PreHdrRoom are as follows:

[0074] If L2<=L1, then the val...

Embodiment 3

[0082] Embodiment 3 of the present invention provides a packet cache management device, such as Figure 9 As shown, the device includes:

[0083] The cache state table creation module 1 is used to create a cache state table for managing the cache block state;

[0084] A search module 2, configured to search for a free cache block according to the cache state table when a message cache request is received;

[0085] The storage module 3 is configured to reserve a header space of a preset length at the first address of the free cache block and use the current memory address as the first address of the data to store the message sending the message cache request;

[0086] The address offset module 4 is used to adjust the address offset of the current data pointer in the message header or the current available header space according to the operation of the message header data in the message processing process;

[0087] The cache release module 5 is configured to use the adjusted d...

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Abstract

The invention provides a message buffer management method and a message buffer management device. The method comprises the following steps that: a buffer state table used for managing a buffer block state is created; when a message buffer request is received, an idle buffer block is found according to the buffer state table; a preset length of head region space is reserved in a position of the first address of the idle buffer block, then, the current memory address is used as a data first address for storing a message for sending the message buffer request; the address offset of a current data pointer is adjusted at a message header or a current available head region space according to the operation on the message header data in the message processing process; and the adjusted data pointer is used as an input parameter for buffer releasing. From the angle of the whole TTL (Time-to-Live) of the message, the method and the device provided by the invention realize the zero copying transmission of the message among all modules inside a central processing unit; the package throughput performance is improved; and meanwhile, the backup on an original address by a buffer user and the memory resource waste due to the backup can be avoided.

Description

technical field [0001] The invention relates to the technical field of data communication, in particular to a message buffer management method and device. Background technique [0002] With the development of information technology, the requirements for data processing throughput performance, especially message throughput performance, are also increasing. In the process of sending and receiving data packets and data processing, it is essential to use cache memory blocks to store and transmit data. [0003] In the traditional message processing process, the message is placed at the top of the cache block, that is, the first address of the data of the message is consistent with the first address of the cache; when transferring data between modules, the interaction of message data must be realized by copying and moving data , specifically, after a module processes the packets in buffer B1, it may need to strip or encapsulate the packet headers and then hand them over to buffer...

Claims

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Application Information

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Patent Type & Authority Patents(China)
IPC IPC(8): G06F12/0893G06F12/0802
Inventor 赵金芳张义周保华张力陈魁
Owner DATANG MOBILE COMM EQUIP CO LTD
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