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Preparation method of LDNMOS tube

A trench and drift region technology, applied in semiconductor/solid-state device manufacturing, electrical components, circuits, etc., to achieve the effect of reducing body current and hot carrier injection effect

Active Publication Date: 2014-11-19
SEMICON MFG INT (SHANGHAI) CORP
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  • Summary
  • Abstract
  • Description
  • Claims
  • Application Information

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Problems solved by technology

Although the performance of this kind of LDNMOS transistor with trenches is superior, the relationship between the substrate current and the gate voltage (ie figure 2 ), it can be seen that there are two peaks in the substrate current, while the MOS tube usually only has one peak value. Therefore, it is necessary to improve the existing method of preparing LDNMOS tubes to further improve the performance of LDNMOS tubes

Method used

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  • Preparation method of LDNMOS tube
  • Preparation method of LDNMOS tube
  • Preparation method of LDNMOS tube

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Embodiment Construction

[0037] The implementation of the present invention will be illustrated by specific specific examples below, and those skilled in the art can easily understand other advantages and effects of the present invention from the contents disclosed in this specification.

[0038] Please refer to Figure 1 to Figure 4 . It should be noted that the structures, proportions, sizes, etc. shown in the drawings attached to this specification are only used to match the content disclosed in the specification, for those who are familiar with this technology to understand and read, and are not used to limit the implementation of the present invention. Limiting conditions, so there is no technical substantive meaning, any modification of structure, change of proportional relationship or adjustment of size, without affecting the effect and purpose of the present invention, should still fall within the scope of the present invention. The disclosed technical content must be within the scope covered...

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Abstract

The invention provides a preparation method of an LDNMOS tube. According to the method provided by the invention, first of all, a first groove is arranged based on the position of a drain electrode area at a doping layer of a substrate, afterwards, a first drift region is formed around the first groove, and a second drift region is formed based on the position of a source electrode area; then, the first groove is filled up with an insulation material, and the surface of a formed structure is planarized; and finally, a grid electrode area is formed on the structure formed when the groove is filled up. Preferably, a second groove can also be arranged on the basis of the position of the source electrode area at the doping layer of the structure, and a second drift region is formed by surrounding the second groove, such that the LDNMOS tube formed by use of the preparation method provided by the invention can effectively decrease body region currents of the LDNMOS tube and reduces the hot carrier injection effect.

Description

technical field [0001] The invention relates to the field of semiconductors, in particular to a method for preparing an LDNMOS tube. Background technique [0002] A laterally diffused MOS transistor (LDMOS transistor) is a power device with a double-diffusion structure, which is widely used because it is easier to be compatible with a CMOS process. LDMOS tubes with various structures are disclosed in Chinese patent documents with application numbers: 200810043765.8, 200810043767.7, 201010147337.7, 201010274487.4, 201010576679.0, 201110005812.1, and 201110434492.1. For LDMOS transistors, the thickness of the epitaxial layer, the doping concentration, and the length of the drift region are the most important characteristic parameters. Although the breakdown voltage can be increased by increasing the length of the drift region, this will increase the chip area and on-resistance. The withstand voltage and on-resistance of high-voltage LDMOS devices depend on the compromise bet...

Claims

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Application Information

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IPC IPC(8): H01L21/336
CPCH01L29/0865H01L29/0882H01L29/66681
Inventor 宋化龙郑大燮施雪捷魏琰刘欣
Owner SEMICON MFG INT (SHANGHAI) CORP
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