Time-domain deconvolution interweaving device and method suitable for DDR memorizer

Abstract

The invention relates to a time-domain deconvolution interweaving device and method suitable for a DDR memorizer. The device comprises two dual-read-write RAMs, an FIFO and two logic control circuits, wherein the first logic control circuit is responsible for performing input data or output data exchange with the two RAMs, the second logic control circuit is responsible for performing data exchange between the two RAMs and a DDR interface, and continuous physical address spaces are respectively allocated for channels 0-50 in the DDR memorizer. When the first logic control circuit updates a group of data in the first RAM or the second RAM each time, the second logic control circuit memorizes the group of data into the corresponding physical address spaces of the DDR memorizer, reads a next group of data and memorizes the next group of data in the corresponding first RAM or the corresponding second RAM. One-row reading-writing is continuously performed each time, one-row reading and one-row writing can be alternatively performed, or all rows can be read and then are written. The time-domain deconvolution interweaving device and method suitable for the DDR memorizer reuses a DDR storage unit, saves an off-chip RAM and improves the DDR efficiency.

Description

technical field [0001] The invention relates to the field of digital signal processing, in particular to a time-domain deconvolution and interleaving device and method suitable for DDR memory. Background technique [0002] In the prior art, in the digital television terrestrial broadcasting transmission system involving convolutional interleaving of symbols in the time domain, correspondingly, deconvolution and interleaving of the symbols is required at the receiving end. Deconvolution interleaving requires a relatively large storage space. In a typical case, the interleaving width B=52, the interleaving depth M=720, and a symbol requires 24 bits, which requires about 3 Mbits of storage space. [0003] A large storage space can use an external dedicated RAM (Random-Access Memory, random access memory), which increases the cost of the chip. The common DDR (Double Data Rate RAM) of the chip has a large storage space, and the deconvolution and interleaving device can use this ...

AI Technical Summary

Problems solved by technology

Due to the different delays of each channel in deconvolution and interleaving, the addresses of each read and write data are not continuous, which will significantly reduce the efficiency of DDR

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