On-chip system bus with anisochronous transmission structure

Abstract

The invention discloses an on-chip system bus, comprising a request priority queue, an arbiter group, an address and control signal selector, an internet and an address decoder. A primary device transmits a bus request signal to the address decoder; the address decoder transmits an application signal to the request priority queue according to the bus request signal; the request priority queue latches the application signal and generates a chip selection signal, and transmits the chip selection signal to the internet, and transmits the application signal to the arbiter group at the same time; the arbiter group transmits an arbitration result signal to the internet; the internet selects data and a handshake signal from the primary device to slave device according to the arbitration result signal, and the internet controls the data and the handshake signal from the primary device to slave device according to the chip selection signal. The on-chip system bus of the invention has different transmission time among different primary devices and slave devices on a large-area chip to achieve high-speed, parallel and real-time communication among devices.

Description

technical field [0001] The invention belongs to the field of on-chip communication, in particular to an on-chip system bus with non-isochronous transmission structure. Background technique [0002] With the development of integrated circuit technology, the SoC requires more processor cores, coprocessor cores and more on-chip peripherals. Moreover, the rapid development of technologies such as multimedia and communication requires a high-speed, parallel, and real-time communication mode between devices on the chip. [0003] In order to pursue a higher transmission rate, the frequency of the system bus is constantly increasing, but because of more functional requirements such as multi-core and multi-peripheral hardware, even with the support of more sophisticated technology, the area of ​​the chip is also constantly expanding, which leads to Discrepancy between on-chip device transfer time and bus frequency. When the various bus systems currently exist are used in high-frequ...

AI Technical Summary

Problems solved by technology

If there is no proper way, when the higher priority device continuously sends bus requests, the lower priority device will not get the right to use the bus for a long time

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