Patterning method and patterning device

Abstract

The invention discloses a patterning method and a patterning device. The patterning method includes: forming a patterned mask layer on a material layer, and the patterned mask layer has a first opening to expose a part of the material layer performing a pretreatment process to modify the exposed material layer of the first opening to form a modified region; performing an etching process to remove the material layer in the modified region to form a second opening.

Description

technical field [0001] The present invention relates to a semiconductor process method and device, and in particular to a patterning method and a patterning device. Background technique [0002] With the increasing demand for high-density memory in the semiconductor industry, such as floating gate memory, charge trapping memory, nonvolatile memory, and embedded memory, the design of memory cells has changed from a planar structure to a three-dimensional structure in order to Increase storage capacity within limited chip area. [0003] In the three-dimensional structure, in order to pursue a higher storage density, the number of stacked layers is continuously increased, so that the aspect ratio of the channel is continuously increased during the etching process. However, the depth that ions used in etching steps such as anisotropic etching can reach is limited, so it is easy to cause incomplete etching and leave ladder-like residues at the bottom of the etched trench. If th...

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Problems solved by technology

However, the ions used in etching steps such as anisotropic etching have a limit to the depth they can reach, which tends to result in incomplete etching, leaving a ladder-like residue at the bottom of the etched trench

If the above-mentioned ladder-shaped residues are not removed in the subsequent process, there will be abnormal conduction when the device is made, resulting in a short circuit

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