Time sequence multiplexing-based FPGA resource optimization scheme

Abstract

The invention relates to the technical field of electronic information, and particularly relates to a time sequence multiplexing-based FPGA resource optimization scheme. The FPGA resource optimization scheme comprises a data acquisition unit, a processing module and an acquisition and timeslot distribution module, wherein the data acquisition unit is provided with n data acquisition paths; and the acquisition and timeslot distribution module is arranged between the data acquisition unit and the processing module. According to the time sequence multiplexing-based FPGA resource optimization scheme, a circuit is shared by multiple channel processing processes by utilizing an FPGA time sequence multiplexing method, and through acquisition and timeslot distribution, the processing clock of the FPGA is improved by four times, so that the aim of saving resources is achieved. The time sequence multiplexing-based FPGA resource optimization scheme has the advantages of saving the resources, saving the time, supporting parallel and serial processing modes and not occupying extra cache.

Description

technical field [0001] The invention relates to the technical field of electronic information, in particular to an FPGA resource optimization scheme based on timing multiplexing. Background technique [0002] A multi-channel parallel processing method based on FPGA, that is, a processing method for multiple data streams, taking four inputs as an example, describes a processing for multiple data streams, the input data timing and processing requirements are as follows : [0003] 1. Input data timing: The data streams a, b, c and d are clocked at double the clock rate, denoted by clk_1x, input data_1, data_2, data_3 and data_4 channels in parallel and continuously updated, as attached figure 1 As shown, that is, when the rising edge of each clock of clk_1x arrives, data_1, data_2, data_3, and data_4 all have new inputs; that is, channels a, b, c, and d all have new inputs; [0004] 2. Processing requirements: When the rising edge of each clock of clk_1x arrives, data process...

AI Technical Summary

Problems solved by technology

This method requires four identical computing modules, that is, computing resources consume four shares, but its simultaneous four-way processing takes the same time as single-way processing, so it is called parallel processing. The advantage is that it shortens the time compared to serial processing Four times the processing time, but consumes four times the computing resources

[0008] Both serial and parallel processing above require four identical computing modules, that is, computing resources consume four

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