A test trimming circuit and an integrated circuit
A technology for integrated circuits and circuit trimming, which is applied in the direction of measuring electricity, measuring electrical variables, and electronic circuit testing, and can solve the problem that integrated circuit parameters, testing and trimming cannot be completed at the same time
Active Publication Date: 2020-04-03
저장진셍일렉트로닉스테크놀러지컴퍼니리미티드
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- Application Information
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Problems solved by technology
However, in this circuit, the parameter test and adjustment of the integrated circuit cannot be completed within one clock sequence of the trigger signal at the same time, and the control signal requires multiple clock sequences to complete the test and adjustment
Method used
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[0041]In order to make the object, technical solution and advantages of the present invention clearer, the present invention will be further described in detail below in conjunction with the accompanying drawings. Obviously, the described embodiments are only some embodiments of the present invention, rather than all embodiments . Based on the embodiments of the present invention, all other embodiments obtained by persons of ordinary skill in the art without making creative efforts belong to the protection scope of the present invention.
[0042] see image 3 , is a functional block diagram of a test trimming circuit provided by an embodiment of the present invention. As shown in the figure, the test trimming circuit includes: a mode selection module, a test module, and a trimming module.
[0043] The test and adjustment circuit is arranged inside the integrated circuit, the enable pin of the integrated circuit (the first pin of the integrated circuit) is reused as the enable...
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The invention discloses a testing trimming circuit and an integrated circuit. The testing trimming circuit comprises a mode selecting module, a testing module, and a trimming module. The testing module and the trimming module are respectively connected with the mode selecting module. The mode selecting module is connected with the first pin of the integrated circuit, and the testing module is connected with the second pin of the integrated circuit. The mode selecting module can be used to receive the trigger signal input by the first pin, and can be used output the first mode selecting signal to the testing module and / or output the second mode selecting signal to the trimming module according to the level of the trigger signal. The testing module can be used for the test of the test position of the integrated circuit after being enabled by the first mode selecting signal, and can be used to output the test information by the second pin. The trimming module can be used for the trimming of the trimming position of the integrated circuit after being enabled by the second mode selecting signal. According to the level of the trigger signal, the testing trimming circuit can be used for the testing or the trimming of the integrated circuit, and the time delay is not required, and then the testing and the trimming of the integrated circuit can be completed in a time sequence.
Description
technical field [0001] The invention relates to the field of circuit control, in particular to a test and adjustment circuit and an integrated circuit. Background technique [0002] Integrated circuits with high-precision output usually require precise trimming after production. Trimming is one of several options that are integrated during IC design selection and solidification based on tested parameters. Trimming is usually performed before wafer dicing and packaging. Accurate testing and trimming before wafer splitting and packaging require the use of expensive machines, and it takes a long time for step-by-step testing and parameter adjustment, which is costly. When the trimmed wafer is packaged, the dicing and packaging processes will have an impact on the physical characteristics of the integrated circuit, which may cause the trimmed parameters to drift. [0003] In order to ensure that each integrated circuit can meet higher precision requirements, the testing and a...
Claims
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IPC IPC(8): G01R31/28
CPCG01R31/2856
Inventor 王晨皓江旭明李龙弟朱海刚
Owner 저장진셍일렉트로닉스테크놀러지컴퍼니리미티드