A Short Period Storage Method Based on ddr2 SDRAM

Abstract

The present invention discloses a method for short cycle data storage based on a DDR2 SDRAM (Double Data Rate 2 SDRAM, the second generation double data rate synchronous dynamic random access memory, DDR2 for short). The method comprises the steps of determining a read-write short cycle and read-write operation execution times in the short cycle according to the storage rate requirement and DDR2 model; designing a few-row-multiple-column storage structure according to a read-write scheme and DDR2 storage space; and controlling the DDR2 to alternatively perform the read-write operation in the short cycle by a user through an MIG (Memory Interface Generator). The problem that in the prior art, continuous in and out of data are restricted by a storage method that read-write operation is individually executed for a long time is solved, and data access efficiency is improved when the DDR2 processes data under the condition that read-write sequences are not consistent.

Description

technical field

[0001] The invention relates to a short-period data storage method of DDR2, which belongs to the field of high-speed data storage. Background technique

[0002] In the engineering implementation process of the system, sometimes the amount of data that needs to be processed and stored in real time is very large, and the off-chip memory must be used with FPGA to meet the storage requirements. The off-chip memory must have the characteristics of large capacity and high-speed storage, so as to further ensure the overall performance of the spaceborne receiver. DDR2 can achieve a higher data transfer rate at a lower core frequency, and has low heat generation and power consumption. In addition, three new technologies are adopted in DDR2: offline drive adjustment OCD, on-chip terminator ODT and pre-CAS, these three new technologies ensure the stability of the internal output drive, suppress signal interference, and improve the performance of DDR2 Read and write ac...

Examples

Embodiment Construction

[0028] The present invention will be further described below in conjunction with the accompanying drawings. A method for storing data in a short period based on DDR2, comprising the following steps:

[0029] Step 1: According to the model and working clock of the DDR2 memory, respectively calculate the number of clock cycles corresponding to DDR2 operations such as reading address wrapping and writing address wrapping, and precharging operations, which are recorded as T r and T w .

[0030] Step 2: Calculate the average data readout rate R of MIG-controlled DDR2 according to storage requirements r and the average write rate R w , indicating the average number of memory cells read or written per clock cycle.

[0031] Step 3, set the number of clock cycles T corresponding to the short cycle of DDR2 storage, and the number of memory cells read and written to DDR2 in each short cycle, respectively recorded as N r and N w , so that the average read and write rate of DDR2 in a...

technical field

[0001] The invention relates to a short-period data storage method of DDR2, which belongs to the field of high-speed data storage. Background technique

[0002] In the engineering implementation process of the system, sometimes the amount of data that needs to be processed and stored in real time is very large, and the off-chip memory must be used with FPGA to meet the storage requirements. The off-chip memory must have the characteristics of large capacity and high-speed storage, so as to further ensure the overall performance of the spaceborne receiver. DDR2 can achieve a higher data transfer rate at a lower core frequency, and has low heat generation and power consumption. In addition, three new technologies are adopted in DDR2: offline drive adjustment OCD, on-chip terminator ODT and pre-CAS, these three new technologies ensure the stability of the internal output drive, suppress signal interference, and improve the performance of DDR2 Read and write ac...

Examples

Embodiment Construction

[0028] The present invention will be further described below in conjunction with the accompanying drawings. A method for storing data in a short period based on DDR2, comprising the following steps:

[0029] Step 1: According to the model and working clock of the DDR2 memory, respectively calculate the number of clock cycles corresponding to DDR2 operations such as reading address wrapping and writing address wrapping, and precharging operations, which are recorded as T r and T w .

[0030] Step 2: Calculate the average data readout rate R of MIG-controlled DDR2 according to storage requirements r and the average write rate R w , indicating the average number of memory cells read or written per clock cycle.

[0031] Step 3, set the number of clock cycles T corresponding to the short cycle of DDR2 storage, and the number of memory cells read and written to DDR2 in each short cycle, respectively recorded as N r and N w , so that the average read and write rate of DDR2 in a...

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