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Method and device used for hot patching of CPU with MIPS architecture

A hot patch and equipment technology, applied in the field of communication, can solve problems such as hot patch

Inactive Publication Date: 2016-08-17
ZTE CORP
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  • Summary
  • Abstract
  • Description
  • Claims
  • Application Information

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Problems solved by technology

[0008] The present invention provides a method and device for hot patching of MIPS architecture CPU to solve the problem of hot patching of MIPS architecture CPU

Method used

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  • Method and device used for hot patching of CPU with MIPS architecture
  • Method and device used for hot patching of CPU with MIPS architecture
  • Method and device used for hot patching of CPU with MIPS architecture

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Embodiment 1

[0043] In order to solve the problem of the hot patch of the MIPS architecture CPU, the technical solution of the present invention modifies the first instruction to a jump instruction, and the second instruction to a null instruction, and can ensure that the CPU jumps by atomically modifying the two operating instructions. Go to the hot patch area to effectively avoid system operation errors.

[0044] Such as figure 1 and figure 2 Shown, the present invention provides a kind of method for the hot patch of MIPS architecture CPU, and described method comprises:

[0045] Step S100: Scan each task stack of the system to detect whether the patched function is interrupted;

[0046] When the patched function is not interrupted, modify the first instruction of the patched function to a breakpoint instruction. If it is detected that the patched function is interrupted, no modification operation is performed, but the scanning of each task stack of the system is continued until it i...

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PUM

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Abstract

The invention provides a method and a device used for hot patching of a CPU with an MIPS (Microprocessor Without Interlocked Piped Stages) architecture. The method comprises the steps of scanning each task stack of a system and detecting whether a patched function is broken or not; when the patched function is not broken, modifying a first instruction of the patched function to a breakpoint instruction and capturing an abnormal signal; and when the abnormal signal is captured, modifying the first instruction of the patched function to a skip instruction and modifying a second instruction of the patched function to a null instruction. According to the technical scheme, two running instructions are atomically modified, so that the CPU can be ensured to skip to a hot patching region and the problem of a system runtime error caused by a delay slot during hot patching of the CPU with the MIPS architecture is solved.

Description

technical field [0001] The invention relates to the field of communications, in particular to a method and equipment for hot patching of MIPS architecture CPUs. Background technique [0002] The emergence of hot patch technology has solved the difficult problem of completing product software defect correction without resetting the hardware device. There are various solutions for the hot patch technology disclosed, and the more common hot patch technology is to use instruction replacement to replace the instruction at the beginning of the function with a jump instruction to jump to the patch area. Common typical patching technical solutions are as follows: [0003] 1. Recompile the patch function funcB to generate a locatable target file fileB. [0004] 2. Analyze the target file fileB in the target machine, extract the code segment, data segment and bss segment into the memory. [0005] 3. Analyze the address of the memory symbol table in the target machine, and resolve t...

Claims

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Application Information

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Patent Type & Authority Applications(China)
IPC IPC(8): G06F11/36
CPCG06F9/48
Inventor 邓娟陈林海朱伟
Owner ZTE CORP
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