Operation circuit based on FPGA (Field Programmable Gate Array), oscilloscope and measuring instrument

A technology for computing circuits and measuring instruments, applied in the field of data processing, can solve the problems of occupying microprocessor resources, system lag, slow speed, etc., and achieve the effect of improving the speed of mathematical operations and reducing the number of splits

Active Publication Date: 2016-08-24
广州致远仪器有限公司
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  • Abstract
  • Description
  • Claims
  • Application Information

AI Technical Summary

Problems solved by technology

The way the microprocessor performs mathematical operations is based on the serial operation of the instruction set, which requires multiple iterations, is slow, and has a single structure, which takes up a lot of microprocessor resources during operations, which can easily lead to system freeze failures.

Method used

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  • Operation circuit based on FPGA (Field Programmable Gate Array), oscilloscope and measuring instrument
  • Operation circuit based on FPGA (Field Programmable Gate Array), oscilloscope and measuring instrument
  • Operation circuit based on FPGA (Field Programmable Gate Array), oscilloscope and measuring instrument

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Embodiment Construction

[0024] The following will clearly and completely describe the technical solutions in the embodiments of the application with reference to the drawings in the embodiments of the application. Apparently, the described embodiments are only some of the embodiments of the application, not all of them. Based on the embodiments in this application, all other embodiments obtained by persons of ordinary skill in the art without making creative efforts belong to the scope of protection of this application.

[0025] An FPGA-based computing circuit disclosed in the present application realizes the parallel operation of data when mathematical operations are performed, and the data is directly stored in the FPGA hardware circuit, which can realize multi-level arbitrary interconnection between various computing modules, so that the mathematical operations can be dismantled The number of divisions is reduced, thereby improving the speed of mathematical operations, and, due to the parallel char...

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Abstract

The invention discloses an operation circuit based on an FPGA (Field Programmable Gate Array), an oscilloscope and a measuring instrument. An output interconnected matrix module is used for taking an operation result outputted by a first operation module as an input quantity of a second operation module and the operation result outputted by a third operation module as a final output; the operation result outputting by the first operation module is served as an the input quantity of other operation modules; the second operation module is an operation module in which the input quantity is served as the operation result outputted by the other operation modules; the third operation module is an operation module in which the outputted operation result is served as the final operation output quantity of the operation module; a same operation module can be served as the first operation module, the second operation module and the third operation module under different operation processes; the multi-level random interconnection between the operation modules can be ensured; the detaching times of the arithmetical operation is reduced, so that the arithmetical operation speed is increased; the parallel characteristics of FPGA have no influence on the other operations of the system in an operation process, so that the condition of system blocking is avoided.

Description

technical field [0001] This application relates to the field of data processing, more specifically, to an FPGA-based computing circuit, an oscilloscope and a measuring instrument. Background technique [0002] The mathematical operation device is one of the functional units of most measuring instruments, which is used to complete mathematical operations. The traditional mathematical operation device is realized by a microprocessor. The structure is as follows: figure 1 As shown, when performing mathematical operations, it is necessary to fetch instructions from the program memory to control the operation unit to obtain data from the data memory for operation, and to control the operation results of the operation unit to be stored in the data memory. [0003] The mathematical operation model can be summarized as y=f[g 1 (x 1 ,x 2 ,...,x n ), g 2 (x 1 ,x 2 ,...,x n ),…,g k (x 1 ,x 2 ,...,x n )] where g 1 … g k is a sub-function, that is, the operation function y ...

Claims

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Application Information

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Patent Type & Authority Applications(China)
IPC IPC(8): G06F7/57G01R13/02
CPCG01R13/0218G06F7/57
Inventor 周立功
Owner 广州致远仪器有限公司
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