DMA controller

Abstract

The invention provides a DMA controller, which issues a standby request in a predetermined period of time before data transfer having a high priority starts and prohibits data transfer having a low priority in advance, so that data transfer having a high priority can generate a transfer cycle from a data transfer start point in time without waiting. Accordingly, a transfer time is reduced, a variation in the transfer time is reduced, and thus a real time property of a system is improved.

Description

technical field [0001] The present invention relates to a DMA controller, and more particularly, to a controller capable of starting high-priority transfer without waiting for low-priority transfer. Background technique [0002] In computers, in order to perform efficient data transfer, a DMA (Direct Memory Access) method is used that directly transfers data between memories and devices without going through a CPU. Such as Figure 5 As shown, DMA forwarding is controlled by a DMA controller, and the forwarded data includes network data packets, image data, sound data, and the like. [0003] The DMA controller performs burst mode transfer in which a plurality of data of consecutive addresses starting from the specified address are transferred together in one cycle, so it has the advantage of high-speed transfer compared to direct transfer to the memory by the CPU . [0004] In addition, the DMA controller works independently of the CPU, so it also has the advantage that the...

AI Technical Summary

Problems solved by technology

However, the access destination of DMA involves many aspects from the internal memory of the system to external storage devices, external devices connected with communication lines, etc., and the forwarding cycle may not be stopped immediately

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