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Structure for transmitting signals in the application space between the device under test and the test electronics

A technology for testing devices and electronic devices, which is applied to measuring devices, electrical signal transmission systems, and electrical measurement, and can solve problems such as complex switching network design

Active Publication Date: 2019-07-30
TERADYNE
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  • Summary
  • Abstract
  • Description
  • Claims
  • Application Information

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Problems solved by technology

These switched network designs can be complex and may require fine-tuning to reduce their impact on the tests performed

Method used

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  • Structure for transmitting signals in the application space between the device under test and the test electronics
  • Structure for transmitting signals in the application space between the device under test and the test electronics
  • Structure for transmitting signals in the application space between the device under test and the test electronics

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Embodiment Construction

[0031] Manufacturers may test devices at various stages of manufacture. In an exemplary fabrication process, a large number of integrated circuits are fabricated on a single silicon wafer. Wafers are diced into individual integrated circuits called die. Each die is then encapsulated in plastic or another packaging material (eg, a chip scale package) to produce a finished product.

[0032] There is an economic incentive for manufacturers to detect and discard failed components as early as possible in the manufacturing process. Therefore, many manufacturers test integrated circuits at the wafer level before dicing the wafers. Defective circuits are identified and typically discarded prior to packaging, saving the cost of multiple packaged defective dies. As a final check, many manufacturers test each finished product before shipment. This program tests the parts in the package, which is more expensive than the barley die. Therefore, the need to discard valuable parts is red...

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Abstract

An exemplary structure for transmitting signals in an application space between a device under test (DUT) and test electronics is disclosed, the exemplary structure includes: a portion of an application space between a device and a device under test (DUT); and a coaxial structure for transmitting signals along an electrical path between the test electronics and the DUT. The coaxial structure includes a signal line at least partially surrounded by a return line.

Description

technical field [0001] This specification generally relates to structures for transmitting signals in an application space between a device under test (DUT) and test electronics. Background technique [0002] Wafer-level testing involves testing the die on the wafer. In this specification, the plural form of "crystal grain" means a plurality of "crystal grains". Probe cards are used when testing die on a wafer. Today's probe cards and device-in-package test boards include switching networks, channels for multitasking and intercommunication with devices under test (e.g., radio transceivers for RF probe cards), and even a manageable number of channels for relatively fast testing channels. These switching network designs can be complex and may require fine-tuning to reduce their impact on the tests performed. The switching network may consist of probe cards or packaged devices testing the stripline layers within the PCB (Printed Circuit Board) and components on the surface ...

Claims

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Application Information

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Patent Type & Authority Patents(China)
IPC IPC(8): G01R31/26G01R31/28G08C19/02
CPCG01R31/31905G01R31/31926G01R31/2889G01R31/01G01R31/2601G01R31/2874
Inventor 罗格·艾伦·辛希莫
Owner TERADYNE