Memory device and method of operating the same

Abstract

A memory device comprising a plurality of memory cells; a nonvolatile memory cell; a test control unit that detects weak memory cells of the plurality of memory cells whose data retention time is less than a first reference time and greater than or equal to a second reference time, wherein The second reference time is less than the first reference time; a programming control unit, which controls the address of the memory unit detected by the test control unit to be programmed in the nonvolatile memory unit; and a refresh control unit, which controls A memory cell corresponding to an address stored in a nonvolatile memory cell is refreshed at a higher frequency than other memory cells.

Description

[0001] Cross references to related applications [0002] This application claims the priority of the Korean patent application filed on October 15, 2015 with the application number 10-2015-0143923, the entire content of which is incorporated herein. Technical field [0003] The various embodiments of the present invention generally relate to semiconductor technology and, more specifically, to a memory device and an operating method thereof. Background technique [0004] The memory device includes a plurality of memory cells. The memory cell of the memory device, such as, for example, a dynamic random access memory (DRAM), may include a transistor that functions as a switch and a capacitor for storing electric charge corresponding to data. The logic level of the data stored in the capacitor of the memory cell can be high (logic level 1) or low (logic level 0) depending on the amount of charge stored in the capacitor. [0005] Theoretically, when data is stored in the memory cell capa...

AI Technical Summary

Problems solved by technology

Discarding a memory device having memory cells with insufficient retention time substantially reduces the manufacturing yield of the memory device

Moreover, the data retention time of the memory cell can be reduced due to various factors even after manufacturing, so even if the memory device passes the testing process, the memory cell may generate errors.

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