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Check cascading polarization code encoding method and system

A coding method and polar code technology, which are applied in the direction of using linear codes for error correction/detection, using block codes for error correction/detection, data representation error detection/correction, etc., which can solve the problem of large implementation complexity and consumption of storage space , high cost and other issues

Active Publication Date: 2017-08-04
HUAZHONG UNIV OF SCI & TECH
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  • Summary
  • Abstract
  • Description
  • Claims
  • Application Information

AI Technical Summary

Problems solved by technology

In order to achieve good error correction performance of the calibrating concatenated polar code, it is necessary to optimize the construction of the verification relationship, that is, to optimize and determine which information bits are verified by each parity bit, which leads to a very complicated verification relationship.
For some relatively long codes, the verification relationship is so complex that it is difficult to express it in text. Even if these verification relations are stored in electronic files, a large amount of storage space will be consumed, resulting in great implementation complexity and high cost.

Method used

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  • Check cascading polarization code encoding method and system
  • Check cascading polarization code encoding method and system
  • Check cascading polarization code encoding method and system

Examples

Experimental program
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Effect test

Embodiment 1

[0107] Embodiment 1: adopt the CRC-4 division circuit to realize the check bit encoder to be selected;

[0108] Let the CRC-4 division circuit generator polynomial be G(X)=X 4 +X+1, then β in the division circuit 0 =1,β 1 =1,β 4 =1, the candidate check bit encoder that adopts CRC-4 division circuit to realize is as image 3 shown.

[0109] input information bit sequence When encoding, the bit v 1 to v 8 Input the check bit encoder to be selected in turn;

[0110] Each input information bit v m (1≤m≤8), output 4 check bits to be selected, numbered 1 to 4 in sequence, and the check bits to be selected are denoted as d m,j , where j is the number of check bits to be selected, 1≤j≤4.

[0111] Set check bit sequence u P The sequence formed by the number of check bits to be selected corresponding to each check bit in is The working process of the check bit encoder to be selected and the check bit selector is shown in Table 1:

[0112] Table 1. Check bit encoder to be ...

Embodiment 2

[0116] Embodiment 2: using a generating matrix to realize a check bit encoder to be selected;

[0117] In this embodiment, M=8, K=4; the candidate check bit encoder generates matrix G' M×K Dimensions are M×K=8×4, generating matrix G′ 8×4 as follows:

[0118]

[0119] The input information bit sequence is Set check bit sequence u P A sequence of check bit numbers to be selected corresponding to each check bit in

[0120] Since the first parity bit u 9 next to the third information bit u 7 After that, therefore the third information bit u 7 When inputting, you need to choose to output the first parity bit u 9 , to encode the formula (d m,1 , d m,2 ,...,d m,K )=(v 1 ,v 2 ,...,v m ,0,0,...,0)G′ M×K For example, according to the generation matrix of the check bit encoder to be selected, the 4 check bits to be selected are: (d 3,1 , d 3,2 , d 3,3 , d 3,4 )=(v 1 ,v 2 ,v 3 ,0,0,0,0,0)G′ 8×4 =(1,0,1,1). Since the first parity bit u 9 The corresponding chec...

Embodiment 3

[0122] Embodiment 3: using multi-output convolutional code encoding to realize the check bit encoder to be selected;

[0123] In this embodiment, the candidate check bit encoder implemented by multi-output convolutional coding is as follows: Figure 4 shown; the input information bit sequence

[0124] Input the bit v sequentially when encoding the check bit encoder to be selected 1 to v 8 ; check bit sequence u P A sequence of check bit numbers to be selected corresponding to each check bit in Table 2 shows the working process of the check bit encoder to be selected and the check bit selector.

[0125] Table 2 Check bit encoder to be selected and check bit selector working process list of embodiment 3

[0126]

[0127]

[0128] The working process and principle of the parity bit selector in this embodiment are explained as follows: because the first parity bit u 9 next to the third information bit u 7 After that, after the third information bit is input, the ou...

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Abstract

The invention discloses a check cascading polarization code encoding method and system. The method comprises the following steps: encoding an input information bit sequence by using a to-be-selected check bit encoder, outputting a plurality of to-be-selected check bits for each input information bit, and selecting a check bit from these to-be-selected check bits; arranging all information bits according to an input sequence, arranging the selected check bit behind the corresponding current information bit, and inserting a fixed bit in the sequence to form a polarization code input sequence; performing polarization code encoding on the polarization code input sequence to obtain a check cascading polarization code codeword; and decoding the check cascading polarization code codeword by using an improved SCL decoding algorithm. The invention further discloses an expression method of the check cascading polarization code. By adoption of the method and system provided by the invention, the check relationship is simplified under the same error correction performance, and thus the check cascading polarization code has a succinct expression method; and when the check relationship is stored in an electronic mode, the storage space is better saved.

Description

technical field [0001] The invention belongs to the technical field of error correction coding and decoding, and more specifically relates to a method and system for calibrating concatenated polar code coding and decoding. Background technique [0002] Polar coding is a new type of coding scheme close to the Shannon limit. The complexity of its coding and decoding algorithm is low, which is beneficial to engineering realization. The simulation results show that the polar code SCL (Successive Cancellation List, continuous elimination list) decoding algorithm in Under the lower complexity O(L·Nlog(N)) (L is the number of paths, N is the code length), the error correction capability can reach that of the maximum likelihood decoder. But for finite code length polar codes using SCL decoding algorithm, there is still a large gap between its error correction performance and the Shannon limit, and this gap cannot be made up by increasing the number of paths alone. [0003] The erro...

Claims

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Application Information

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Patent Type & Authority Applications(China)
IPC IPC(8): H03M13/13
CPCH03M13/13
Inventor 屈代明王涛江涛
Owner HUAZHONG UNIV OF SCI & TECH
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