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A Realization Method of Shortest Route Based on FPGA

An implementation method, the shortest path technology, applied in the field of the Internet, can solve the problems of huge network structure, topology synchronization transmission path selection, and the inability of a single controller to efficiently control the switch to forward data, so as to reduce the impact of network performance and speed up transmission Effect

Active Publication Date: 2021-06-29
GUILIN UNIV OF ELECTRONIC TECH
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Problems solved by technology

However, while the SDN centralized control method brings convenience to network data transmission, there are also problems. That is, when the network is relatively complex, the SDN network structure will become very large, making it impossible for a single controller to efficiently control the forwarding of data by the switch.
Using multiple controllers to control a relatively simple network separately can reduce the pressure on each controller, but there are also a series of problems such as topology synchronization and transmission path selection.

Method used

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  • A Realization Method of Shortest Route Based on FPGA

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Embodiment Construction

[0020] In order to make the object, technical solution and advantages of the present invention clearer, the present invention will be further described in detail below in combination with specific examples and with reference to the accompanying drawings.

[0021] A shortest route implementation method based on FPGA, such as figure 1 As shown, it specifically includes the following steps:

[0022] Step S1: The SDN controller encapsulates the topology information through the UDP protocol and transmits it to the FPGA. The topology information includes src_Switch (source switch), src_Port (source port number), dst_Switch (destination switch), dst_Port (destination port number), weight (weight);

[0023] Step S2: The FPGA receives the UDP data sent by each SDN controller, decapsulates it to extract topology information, uses src_Switch as the address ram1_addr of RAM1 (the address of RAM1 on-chip), and reads the write_addr corresponding to RAM1;

[0024] Step S21: write_addr is u...

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Abstract

The invention discloses an FPGA-based shortest route realization method. Utilizing the high-speed concurrent feature of the FPGA, the SDN controller uploads topology information through the UDP protocol, and the FPGA parses the UDP data packets to obtain the topology information and stores it in the DDR2. When a user initiates an access request, access DDR2 to obtain topology information and obtain the best transmission path information through the shortest route algorithm, package the information into UDP data and send it to the SDN controller. The invention can realize the improvement of data transmission efficiency under the high-speed network environment.

Description

technical field [0001] The invention relates to the technical field of the Internet, in particular to an FPGA-based shortest route realization method. Background technique [0002] With the rapid development of network technology and the emergence of massive data processing technologies such as cloud computing and big data, traditional switching devices cannot meet the current network data transmission and performance requirements. SDN (Software Defined Networking) separates forwarding and control, enabling flexible control while fast forwarding. However, while the SDN centralized control method brings convenience to network data transmission, there are also problems. That is, when the network is relatively complex, the SDN network structure will become very large, making it impossible for a single controller to efficiently control the forwarding of data by the switch. . Using multiple controllers to separately control a relatively simple network can reduce the pressure on...

Claims

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Application Information

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Patent Type & Authority Patents(China)
IPC IPC(8): H04L12/721H04L12/743H04L12/747H04L12/751H04L12/935H04L12/947H04L45/02H04L49/111
CPCH04L45/02H04L45/12H04L45/742H04L49/252H04L49/30H04L45/74591
Inventor 王勇何雄森张学庆叶苗俸皓
Owner GUILIN UNIV OF ELECTRONIC TECH
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