A kind of cmos device and manufacturing method thereof

A manufacturing method and device technology, applied in the fields of semiconductor/solid-state device manufacturing, electrical components, transistors, etc., can solve problems such as the inability to achieve multi-threshold regulation, and achieve threshold regulation with little correlation, high control accuracy, and integration. simple craftsmanship

Active Publication Date: 2020-03-31
INST OF MICROELECTRONICS CHINESE ACAD OF SCI +1
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  • Abstract
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  • Claims
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AI Technical Summary

Problems solved by technology

[0003] After entering the nanometer node, the adjustment of the threshold voltage of CMOS devices has always been an important and difficult point in the manufacture of semiconductor devices. At present, it is mainly adjusted by adjusting ion implantation, gate length, gate dielectric layer thickness and work function layer thickness. The threshold voltage of semiconductor devices, and with the further reduction in the size of semiconductor devices, especially when entering below the 10nm node, multiple threshold voltages need to be adjusted, but due to the space constraints and parasitic effects brought about by the size reduction, Higher requirements are put forward for the threshold adjustment of CMOS devices, and these traditional methods can no longer achieve multi-threshold adjustment well.

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  • A kind of cmos device and manufacturing method thereof
  • A kind of cmos device and manufacturing method thereof
  • A kind of cmos device and manufacturing method thereof

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Embodiment Construction

[0036] As mentioned in the background technology section, due to the space limitation and parasitic effects caused by size reduction in the prior art, higher requirements are put forward for the threshold adjustment of CMOS devices, and the traditional threshold adjustment method has not been well realized. Multi-threshold regulation.

[0037] Specifically, the method for adjusting the threshold of a CMOS device in the prior art is: first deposit a barrier layer on the metal gates of the NMOS region and the PMOS region, then adjust the thickness of the barrier layer, then deposit a PMOS work function layer (PMOS WFL), and then change The thickness of the PMOSWFL is used to adjust the PMOS threshold; the NMOS work function layer (NMOS WFL) is then deposited, and the NMOS WFL is combined with the change in the thickness of the previous barrier layer to jointly adjust the NMOS threshold. Since the NMOS threshold adjustment process in the existing method needs to be divided into t...

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Abstract

The invention provides a CMOS device and a manufacturing method therefor. One parts of an NMOS channel region and a PMOS channel region are subjected to first plasma treatment while the other parts ofthe NMOS channel region and the PMOS channel region are subjected to second plasma treatment; the work functions of the NMOS region and the PMOS region can be adjusted at the same time in each time of plasma treatment; the work function of the CMOS device can be adjusted without needing adjustment of the thickness of a barrier layer, thereby enabling the integrated process to be simpler; the NMOSand PMOS threshold value adjustment is relatively low in correlation, so that the control precision is higher; and in addition, by virtue of the two times of different plasma treatment, the work functions of different parts of the NMOS channel region and the PMOS channel region are different, so that the CMOS device with more than three threshold values can be obtained.

Description

technical field [0001] The present invention relates to the technical field of semiconductor device manufacturing, and more specifically, to a CMOS (Complementary Metal Oxide Semiconductor, Complementary Metal Oxide Semiconductor) device and a manufacturing method thereof. Background technique [0002] As the integration level of integrated circuits continues to increase, the size of devices continues to decrease. It is difficult for traditional planar CMOS (Complementary Metal Oxide Semiconductor) devices to continue to reduce the key dimensions. Three-dimensional devices such as FINFET (Fin Field Effect Transistor) and Nanowire channel devices are gradually becoming the mainstream trend. [0003] After entering the nanometer node, the adjustment of the threshold voltage of CMOS devices has always been an important and difficult point in the manufacture of semiconductor devices. At present, it is mainly adjusted by adjusting ion implantation, gate length, gate dielectric la...

Claims

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Application Information

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Patent Type & Authority Patents(China)
IPC IPC(8): H01L21/8238H01L27/092
Inventor 殷华湘姚佳欣赵超叶甜春
Owner INST OF MICROELECTRONICS CHINESE ACAD OF SCI
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