DSP-FPGA/CPLD multi-dimensional interconnected control method

Abstract

The invention provides a DSP-FPGA / CPLD multi-dimensional interconnected control method. The method is applied to a controller including a digital signal processor (DSP) and a field programmable gate array / complex programmable logic device (FPGA / CPLD) chip. The DSP and the FPGA / CPLD carry out data exchange through an external memory extended Xintf interface or a general input / output GPIO interface.The DSP is used for carrying out external signal sampling and carrying out analog-to-digital conversion, data operation, and processing on the external signal, transmitting calculated duty cycle datato the FPGA / CPLD; and the FPGA / CPLD is used for generating a PWM signal based on the received duty cycle data. According to the invention, the controller has high universality and expansibility; theclear division of work as well as function and action coordination and synchronization is realized; and the need of control of various power electronics and motor systems is met.

Description

technical field [0001] The present invention relates to the technical field of power electronics, in particular, to a digital signal processor (Digital Signal Processor, DSP) and field programmable gate array / complex programmable logic device (Programmable GateArray / Complex Programmable Logic Device, FPGA / CPLD) multi-dimensional interconnected control methods. Background technique [0002] With the rapid development of power level, topology and application fields, power electronic devices have performance requirements for their controllers in terms of computing speed, protection capability, scalability, and pulse width modulation (Pulse Width Modulation, PWM) signal output, etc. Higher and higher. [0003] The traditional DSP-based single-chip controller architecture has become more and more difficult to meet the needs of modern power electronic devices due to its limitations in scalability, versatility, and number of interfaces. However, the existing controller architectu...

AI Technical Summary

Problems solved by technology

[0003] The traditional DSP-based single-chip controller architecture has become more and more difficult to meet the needs of modern power electronic devices due to its limitations in scalability, versatility, and number of interfaces.

However, the existing controller architecture based on DSP and FPGA / CPLD multi-chips greatly expands the input and output capabilities of DSP through FPGA / CPLD, but there are still few and slow data exchanges between chips, and the division of labor between chips is unreasonable. , to achieve problems such as asynchronous functions and uncoordinated protection actions

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