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Input output control circuit for serial port communication

A technology of input and output, serial communication, applied in the field of communication, can solve the problem of unable to maintain the initial state of the processor, and achieve the effect of avoiding configuration errors

Inactive Publication Date: 2018-07-31
SHANGHAI KANGFEI INFORMATION TECH CO LTD
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  • Summary
  • Abstract
  • Description
  • Claims
  • Application Information

AI Technical Summary

Problems solved by technology

[0005] The above solution implements level conversion by adding a protection circuit between the two processors to avoid damage to the circuit due to level mismatch, but it still cannot maintain the initial state of the respective levels of the two processors without affecting the processor's power-on configuration

Method used

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  • Input output control circuit for serial port communication
  • Input output control circuit for serial port communication

Examples

Experimental program
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Effect test

Embodiment 1

[0028] In the prior art, in order to solve the series of problems caused by the different configuration levels of the UART serial ports between the two MCUs and the mismatch of communication, the method of avoiding the preferred serial port is used, and the next best thing is to choose other interfaces, or even replace it with More expensive MCU processors without multiplexed configuration pins lead to new problems such as reduced circuit performance and increased costs.

[0029] Specifically, in order to solve a series of problems caused by the mismatch of UART serial port communication levels between two MCUs, this embodiment adopts the following technical solutions:

[0030] Moreover, it should be noted that this embodiment is mainly aimed at the situation that the initial state of the signal input end requires configuration to be low level, and the initial state of the signal receiving end MCU2_UART_RX requires configuration to be high level. By adopting the following tech...

Embodiment 2

[0043] Such as figure 2 As shown, this embodiment is similar to Embodiment 1, the difference is that this embodiment is mainly aimed at the situation that the initial state of the signal input end requires configuration to be high level, and the initial state of the signal receiving end MCU2_UART_RX requires configuration to be low level.

[0044] Specifically, the common end of the latch input terminal A of this embodiment and the signal output terminal MCU1_UART_TX of the first processor MCU1 is connected to the first power supply terminal VCC_MCU1 of the first processor MCU1 through a second pull-up resistor R2, the The common terminal of the latch output terminal Y of the second processor MCU2 and the signal receiving terminal MCU2_UART_RX of the second processor MCU2 is grounded through a second pull-down resistor R5, and the second pull-up resistor R2 is used to satisfy the power-on configuration of the first processor MCU1 as high level state, the second pull-down resi...

Embodiment 3

[0049] This embodiment is similar to Embodiment 1, and it is also aimed at the situation that the initial state of the signal input end is required to be configured as a low level, and the initial state of the signal receiving end MCU2_UART_RX is required to be configured as a high level. end Connected to the level-controllable interface, the level-controllable interface is the general-purpose serial port of the third processor, or the non-power-on strap pin end of the first processor MCU1 or the second processor MCU2, that is, it does not affect the processing The pin end of the device is powered on, and the enable end Grounded through the third pull-down resistor, here the enable terminal Active high.

[0050] When powered on, both the first processor MCU1 and the second processor MCU2 read the external configuration first, and then start communication, and control the output state of the level-controllable interface before using UART communication. When controlled by...

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PUM

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Abstract

The invention discloses an input output control circuit for serial port communication. The input output control circuit comprises a first processor, a second processor, a signal output end of the first processor and a signal receiving end of the second processor; a latch circuit with an enable end is connected between the first processor and the second processor, and the enable end is connected toa level controllable interface; the signal output end is connected to the latch input end of the latch circuit; the signal receiving end is connected to the latch output end of the latch circuit; thelatch input end is connected to the ground through a first pull-down resistor, and the latch output end is connected to a power supply end through a first pull-up resistor; or, the latch input end isconnected to the power supply end through a second pull-up resistor, and the latch output end is connected to the ground through a second pull-down resistor. The input output control circuit has theadvantages that the problem of communication between two processors different in power-on configuration can be solved; and the problems of configuration errors, even normal startup incapability and the like due to different power-on configurations in the prior art are avoided.

Description

technical field [0001] The invention belongs to the technical field of communication, and in particular relates to an input and output control circuit for serial port communication. Background technique [0002] Universal Serial Port (UART), as a simple and applicable communication interface, has strong vitality. Under the circumstance that various new communication methods emerge in an endless stream, the Universal Serial Port (UART) still plays an irreplaceable role in the communication field. [0003] Due to the characteristics of the serial port such as simple communication lines, communication is often used for communication between MCUs (micro control units). However, some UART and other serial port input and output pins of the MCU are also power-on strap pins. Therefore, when connecting MCUs through serial ports, it is necessary to consider that the respective levels cannot affect the power-on configuration of the processor. Ping leads to configuration errors, which...

Claims

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Application Information

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Patent Type & Authority Applications(China)
IPC IPC(8): G06F13/38G06F13/40G06F13/42
CPCG06F13/387G06F13/4068G06F13/4282G06F2213/3812
Inventor 裴志刚
Owner SHANGHAI KANGFEI INFORMATION TECH CO LTD
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