Low-complexity timing synchronization processing method and device based on dual-edge detection

A timing synchronization, low-complexity technology, applied in the direction of synchronization devices, digital transmission systems, electrical components, etc., can solve the problems of information frame length, complex feedback control loop, low bandwidth utilization, etc., and achieve timing synchronization processing delay Small size, simple principle and structure, and high performance of timing synchronization

Active Publication Date: 2020-12-15
TSINGHUA UNIV
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Problems solved by technology

[0003] Typical timing synchronization methods include: early-late gate, M&M, Gardner, etc. However, these typical timing synchronization algorithms all use a feedback tracking loop structure, resulting in high complexity; at the same time, these typical timing synchronization algorithms It is necessary to rely on and consume a certain amount of effective signals to estimate the sampling time deviation, which makes these algorithms limited in burst communication applications with fewer information frames; of course, some solutions are given in some applications, such as for sending signals Spread spectrum, detect the correlation peak of the signal at the receiving end; or add a pilot sequence at the front end of the effective signal, and then perform auxiliary timing synchronization; or design the signal format as subframe combination, and predict the sampling time deviation by correlating the delay relationship between subframes ; Although the above solutions can complete the timing synchronization of the burst communication process, it will bring new problems such as excessive processing delay, low bandwidth utilization, long information frame, high system complexity, etc.
[0004] In the related art, the following methods are included: (1) a timing synchronization method based on interpolation filtering, which can obtain high-precision timing synchronization signals through interpolation filtering and feedback control under the condition of low sampling rate, but adopts complex Feedback control loop, and it needs to rely on enough effective signals to complete timing synchronization, which has high complexity and is not conducive to burst communication
(2) A satellite communication burst timing synchronization system, this method can accurately locate the optimal sampling position of less unique code bursts, but needs to adopt two-stage timing synchronization units and include two-stage buffer units to buffer burst signals, High system complexity and large consumption of system memory and resources
(3) A parallel non-data-assisted Gardner timing synchronization method, which is suitable for wireless burst communication systems, but needs to store the received data in RAM or FIFO first, which consumes a lot of system resources, and adopts a closed-loop tracking loop Road-based method, large processing delay and high system complexity

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  • Low-complexity timing synchronization processing method and device based on dual-edge detection
  • Low-complexity timing synchronization processing method and device based on dual-edge detection
  • Low-complexity timing synchronization processing method and device based on dual-edge detection

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[0031] The following describes in detail the embodiments of the present invention, examples of which are illustrated in the accompanying drawings, wherein the same or similar reference numerals refer to the same or similar elements or elements having the same or similar functions throughout. The embodiments described below with reference to the accompanying drawings are exemplary, and are intended to explain the present invention and should not be construed as limiting the present invention.

[0032]The following describes the low-complexity timing synchronization processing method and device based on double-edge detection according to the embodiments of the present invention with reference to the accompanying drawings. First, the low-complexity timing synchronization based on double-edge detection according to the embodiments of the present invention will be described with reference to the accompanying drawings. Approach.

[0033] figure 1 This is a flowchart of a low-comple...

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Abstract

The invention discloses a low-complexity timing synchronization processing method and device based on double-edge detection. The method comprises a step of detecting double edges of a signal, whereinthe double edges comprise a rising edge and a falling edge, a step of determining the number of sampling points of each code element period according to a system sampling rate, a signal bandwidth anda signal modulation mode, and a step of performing triggering, the counting of a counter, the comparison of a comparator, counter resetting and the judgment of an optimal sampling point through the double edges to realize the timing synchronization processing of received signals. The method has the advantages of simple and realization principle structure, low system resource consumption, small timing synchronization processing delay, high timing synchronization performance, high versatility and easy implementation.

Description

technical field [0001] The present invention relates to the technical field of communication signal processing, in particular to a low-complexity timing synchronization processing method and device based on double edge detection. Background technique [0002] In the related art, in the digital receiver of communication, since the sampling clock of the receiver and the clock of the transmitting end are independent of each other, in order to output the demodulation symbols at the accurate sampling decision time, it is necessary to use a timing synchronization algorithm to estimate the period of the transmitted symbols. Therefore, timing synchronization is one of the most critical technologies of communication digital receivers. [0003] Typical timing synchronization methods are: early-late gate, M&M, Gardner, etc. However, these typical timing synchronization algorithms all use a feedback tracking loop structure, resulting in high complexity; at the same time, these typical t...

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Application Information

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Patent Type & Authority Patents(China)
IPC IPC(8): H04L7/00H04L7/033
CPCH04L7/00H04L7/033
Inventor 陶青长梁志恒吴志林
Owner TSINGHUA UNIV
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