A kind of grain defect monitoring method

Abstract

The invention discloses a crystal grain defect monitoring method, which is suitable for the production process of integrated circuits, and provides a virtual standard wafer, virtual coordinates on the virtual standard wafer, and the correspondence between the virtual coordinates and the crystal grains on the virtual standard wafer relationship; including the following steps: step S1, providing a wafer, performing a defect detection operation on the wafer to obtain the defect position in the wafer; step S2, converting the actual coordinates of the defect position on the wafer to virtual coordinates; step S3, according to the virtual The coordinates are obtained and the position of the crystal grain corresponding to the defect position is recorded; Step S4, steps S1 to S3 are repeated; Step S5, according to the recorded position of the grain corresponding to the defect position, the defect change trend of each grain is obtained. The beneficial effect of the technical solution of the present invention is that: it is possible to find the defect abnormality in a specific area on the wafer surface at the grain level, monitor the change trend of the defect, and issue an effective alarm.

Description

technical field [0001] The invention relates to the field of integrated circuit production, in particular to a crystal grain defect monitoring method. Background technique [0002] The fabrication of integrated circuits on semiconductor substrates such as silicon wafers is extremely complex and involves many steps, each with many parameters that are tightly controlled to ensure stable and accurate results. However, there are physical factors that can cause unintentional errors in any step of the integrated circuit fabrication process. These physical factors come from variations in the substrate itself, tiny mechanical or optical errors in manufacturing equipment, dust and dirt, and environmental variations. For example, a slight misalignment that causes a loss of focus. In-process inaccuracies may be a function of time in successive wafers or in various parts of a wafer, or both. When either a single type of error or multiple errors occur simultaneously, the characteristi...

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Problems solved by technology

[0004] As shown in Figure 2(a) and Figure 2(b), due to the particularity of some production equipment, defects will be dropped at fixed positions on the wafer during production, and there is no way to detect such defects come out

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