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Damascus integrated etching optimization method for metal hard mask

An optimization method and hard technology, applied in the fields of semiconductor/solid-state device manufacturing, electrical components, circuits, etc., which can solve the problems of geometric series yield impact, inability to fill metal, and inability to conduct circuits, and achieve blocking etching Defects and effects of improved cavity particle condition and reduced likelihood

Active Publication Date: 2019-08-30
SHANGHAI HUALI INTEGRATED CIRCUTE MFG CO LTD
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  • Summary
  • Abstract
  • Description
  • Claims
  • Application Information

AI Technical Summary

Problems solved by technology

[0003] 1. The metal hard mask Damascus integrated etching often has defects due to pollutants blocking the etching, which eventually leads to the failure of the metal to be filled and the circuit to be unable to conduct
[0004] 2. Metal hard mask Damascus integrated etching wafer position edge blocking etching defect is more serious than the middle phenomenon
[0005] 3. The integrated etching of metal hard mask Damascus will cause the yield rate of geometric progression due to the accumulation of multiple etching layers

Method used

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  • Damascus integrated etching optimization method for metal hard mask
  • Damascus integrated etching optimization method for metal hard mask
  • Damascus integrated etching optimization method for metal hard mask

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no. 1 example

[0028] The first embodiment of the metal hard mask Damascus integrated etching optimization method provided by the present invention includes the following steps:

[0029] 1) Perform metal hard mask Damascus integrated etching, record the specified parameters of the transmission chamber and the main etching chamber during the preset period, and record the working conditions of the Damascus integrated etching pump body valve during the preset period;

[0030] 2) Record whether there are blocking etching defects or cavity particles after the integrated etching of damascene is completed;

[0031] 3) Perform the above steps 1) and 2) repeatedly, make statistics on the records of the above steps 1) and 2), and extract the valve work of the pump body during the preset period of Damascus integrated etching without blocking etching defects or cavity particles. The condition is used as the standard working condition of the pump body valve;

[0032] 4) When performing metal hard mask D...

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Abstract

The invention discloses a Damascus integrated etching optimization method for a metal hard mask, and the method comprises the steps: executing Damascus integrated etching of the metal hard mask, recording specified parameters of a transmission cavity boy and a main etching cavity body in a preset time period, and recording the working condition of a Damascus integrated etching pump body valve in the preset time period; recording whether etching blocking defects or cavity body particles exist or not after Damascus integrated etching is completed; repeatedly executing the above steps, counting the records in the above steps, and extracting working condition of the pump body valve in the Damascus integrated etching preset time period when no blocking etching defect or cavity particle occurs as the standard working condition of the pump body valve; and when Damascus integrated etching production of the metal hard mask is executed, executing the standard working condition of the pump body valve. According to the invention, strong fluctuation of the pressure of the cavity body is avoided by optimizing and controlling the angle of the pump body valve, the probability of raising pollutantsin the pump body is finally reduced by combining the opening and closing time of the pump body valve, and the etching defect and the particle condition of the cavity body are avoided.

Description

technical field [0001] The invention relates to the field of semiconductor manufacturing, in particular to a metal hard mask damascene integrated etching optimization method. Background technique [0002] With the reduction of the size of semiconductor devices, in the process technology of 65nm and below, the integrated etching of metal hard mask damascene often has defects that block etching. Part of the reason for this defect is that during the wafer transfer process and during the etching process, due to the fluctuation of the process step conversion pressure, there is air flow disturbance in the chamber, which promotes the surrounding of the chamber, the pump body and the hidden parts in contact with the wafer. Particles fall to the surface of the wafer and eventually form a blocking etch, which prevents the subsequent metal from being filled into it, which will cause the metal circuit to be unable to conduct. While the metal hard mask Damascus integrated etching proces...

Claims

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Application Information

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IPC IPC(8): H01L21/768H01L21/67
CPCH01L21/67253H01L21/7681
Inventor 庄望超
Owner SHANGHAI HUALI INTEGRATED CIRCUTE MFG CO LTD