A Digital Background Correction Method Based on Least Mean Square Algorithm

A calibration method and digital technology, applied in the direction of analog/digital conversion calibration/test, analog/digital conversion, instruments, etc., can solve the problems of invalid calibration, inability to correct the mismatching direction, and failure to correct the highest bit capacitance, etc., to achieve guaranteed correctness effect

A calibration method and digital technology, applied in the direction of analog/digital conversion calibration/test, analog/digital conversion, instruments, etc., can solve the problems of invalid calibration, inability to correct the mismatching direction, and failure to correct the highest bit capacitance, etc., to achieve guaranteed correctness effect

CN110350918BActive Publication Date: 2022-04-22UNIV OF ELECTRONICS SCI & TECH OF CHINA +1

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  • A Digital Background Correction Method Based on Least Mean Square Algorithm
  • A Digital Background Correction Method Based on Least Mean Square Algorithm
  • A Digital Background Correction Method Based on Least Mean Square Algorithm

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Embodiment Construction

[0051] Below in conjunction with accompanying drawing, further illustrate the present invention through embodiment.

[0052] Such as figure 1 Shown is a frame diagram of a digital background correction method based on the least mean square algorithm proposed by the present invention, and the structure that adopts the method of the present invention to correct includes split SAR ADC, LMSω iA Calibration module, LMSω iB Correction module, the first cumulative codeword calculation module and the second cumulative codeword calculation module, the split SAR ADC includes the first analog-to-digital conversion module ADC A and the second analog-to-digital conversion module ADC B, the first analog-to-digital conversion module ADC A Connect the input signal V with the input terminal of the second analog-to-digital conversion module ADC B module in , the output end of the first analog-to-digital conversion module ADC A module is connected to the first input end of the first accumulate...

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Abstract

A digital background correction method based on least mean square algorithm for split SAR ADC. First set up the split SAR ADC, and perform digital background correction based on the least mean square algorithm for the set split SAR ADC; the split SAR ADC includes two ADC modules, and the main DAC capacitor array in each ADC module uses non-binary capacitors At the same time, the weight of the highest capacitor in the main DAC redundant capacitor array is set to the minimum, so that the random switching of the correction DAC capacitor array can effectively correct each capacitor in the main DAC capacitor array, including the capacitor with the largest weight, and improve The linearity and dynamic range of the ADC; the introduction of the random switching method of the correction DAC can effectively solve the problem that the two ADC capacitors are mismatched in the same direction and cause the correction to be invalid; in addition, the main DAC capacitor array introduces redundancy, which can weaken the system during the quantization process. The dynamic error introduced ensures the correctness of each switch and improves the speed of iteration.

Description

technical field [0001] The invention belongs to the technical field of analog integrated circuits, and in particular relates to a digital background correction method based on a least mean square algorithm (LMS), which is used for correcting a capacitance array of a high-precision successive approximation analog-to-digital converter (SAR ADC). Background technique [0002] With the improvement of the precision of the analog-to-digital converter (ADC), the matching precision of the capacitor determines the static and dynamic performance of the ADC in a small-scale process. In addition to a better layout of the capacitor array layout, we also need to correct the capacitor array. The current mainstream correction methods include digital correction and analog correction. Digital correction means that the elimination of capacitor mismatch is completed in the digital domain. The weight of each capacitor corresponds to a digital codeword. This codeword corresponds to the digital w...

Claims

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Application Information

Patent Timeline
22 Apr 2022
Publication
CN110350918B
IPC
H03M1/10; H03M1/46
CPC
H03M1/1004; H03M1/468
Inventors
于奇; 王艾意