Vertical tunneling transistor based on graphene-molybdenum disulfide heterostructure

Abstract

The invention discloses a vertical tunneling transistor based on a graphene-molybdenum disulfide heterostructure. The transistor comprises a first graphene layer, a second graphene layer, a molybdenumdisulfide layer between the first graphene layer and the second graphite layer, hexagonal boron nitride under the second graphene layer, and a substrate in order from top to bottom. According to theinvention, molybdenum disulfide replaces hexagonal boron nitride to be used as a tunnel barrier; a vertical tunneling graphene field effect transistor and a vertical tunneling graphene nanostrip fieldeffect transistor are simulated; and the vertical tunneling transistor has the advantages of higher switching current ratio, stronger transmission characteristic and lower cost, and can be used for digital applications.

Description

technical field [0001] The invention relates to semiconductor technology, in particular to a vertical tunneling transistor based on a graphene-molybdenum disulfide heterostructure. Background technique [0002] Graphene has shown remarkable electronic properties and broad application prospects in next-generation electronic devices. However, the performance of graphene field-effect transistors is limited. Due to its zero-energy bandgap, the resulting on-off ratio is less than 10. To address this issue, graphene nanoribbon patterns are proposed, however, the performance of vertical tunneling graphene field-effect transistors is limited due to undesired line-edge disorder. Furthermore, a very high electric field is required to induce a bandgap in bilayer graphene, which is difficult to achieve in integrated circuits. An alternative approach to increase the on-off ratio of graphene devices is to utilize tunnel-based device architectures. Tunneling field-effect transistors ba...

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