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Circuits for a comparator and methods for reducing kickback noise in the comparator

A comparator and circuit technology, which is applied in the direction of electric pulse generator circuit, electric pulse generation, differential amplifier pulse generation, etc., can solve problems such as poor signal-to-noise ratio and lower comparator performance

Pending Publication Date: 2020-04-03
TAIWAN SEMICON MFG CO LTD
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  • Summary
  • Abstract
  • Description
  • Claims
  • Application Information

AI Technical Summary

Problems solved by technology

These uncontrolled internal nodes can generate unequal kickback noise when the comparator is on or in latch operation, which can significantly degrade comparator performance
For example, an analog-to-digital converter (ADC) with such a comparator would suffer from poor signal-to-noise ratio (SNR) performance

Method used

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  • Circuits for a comparator and methods for reducing kickback noise in the comparator
  • Circuits for a comparator and methods for reducing kickback noise in the comparator
  • Circuits for a comparator and methods for reducing kickback noise in the comparator

Examples

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Embodiment Construction

[0047] The following disclosure describes various exemplary embodiments for implementing different features of the subject matter. Specific examples of components and arrangements are described below to simplify the present disclosure. Of course, these are only examples and are not intended to be limiting. For example, in the following description, forming the first feature on or on the second feature may include an embodiment in which the first feature and the second feature are formed in direct contact, and may also include additional features that may be formed on the first feature and The second feature is an embodiment in which the first feature and the second feature may not directly contact each other. In addition, the present disclosure may repeat reference numerals and / or letters in various examples. This repetition is for the purpose of simplification and clarity, and does not itself prescribe the relationship between the various embodiments and / or configurations di...

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PUM

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Abstract

Circuits and methods for reducing and cancelling out kickback noise are disclosed. In one example, a circuit for a comparator is disclosed. The circuit includes: a first transistor group, a second transistor group, and a first switch. The first transistor group comprises a first transistor having a drain coupled to a first node, and a second transistor having a source coupled to the first node. Gates of the first transistor and the second transistor are coupled together to a first input of the comparator. The second transistor group comprises a third transistor having a drain coupled to a second node, and a fourth transistor having a source coupled to the second node. Gates of the third transistor and the fourth transistor are coupled together to a second input of the comparator. The firstswitch is connected to and between the first node and the second node.

Description

[0001] Cross reference of related applications [0002] This application claims priority to U.S. Provisional Patent Application No. 62 / 737,379 filed on September 27, 2018, which is incorporated herein by reference in its entirety. Technical field [0003] This application relates to a circuit for a comparator and a method for reducing the kickback noise in the comparator. Background technique [0004] In many integrated circuits (IC), transistors with long channel lengths are required to improve circuit performance, for example, to avoid or reduce the input offset of the comparator and input reference noise. As semiconductor process nodes and electronic components in ICs continue to shrink (for example, 20 nanometers, 16 nanometers and smaller), single transistors with long channel lengths are no longer available. [0005] Stacking the gates of multi-level transistors (for example, metal-oxide-semiconductor (MOS) transistors with a small channel length) can form an equivalent transis...

Claims

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Application Information

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IPC IPC(8): H03K5/24H03M1/08
CPCH03K5/2481H03M1/0863H03K5/249H03K3/023H03K3/013
Inventor 张清河洪照俊彭永州
Owner TAIWAN SEMICON MFG CO LTD