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Method and device for bus address expansion

A bus address and address technology, applied in the computer field, can solve the problems of increased equipment capacity, insufficient equipment address of equipment flags, limited bus address, etc., to achieve the effect of expanding the scope, increasing the number of equipment mounted, and increasing the budget cost

Active Publication Date: 2021-10-01
PHYTIUM TECH CO LTD
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  • Summary
  • Abstract
  • Description
  • Claims
  • Application Information

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Problems solved by technology

[0004] The technical problem to be solved by the present invention: Aiming at the above-mentioned problems of the prior art, a method and device for expanding the bus address are provided. The present invention can solve the problem that the number of connected devices under the bus cannot be increased or the The problem that the bus address cannot be covered due to the increase of the capacity of the single device connected under the bus can solve the problem of incomplete coverage of the bus address due to the increase of the device capacity, and solve the problem of corresponding device signs due to the increase in the number of devices connected to the bus Bit or device address is not enough

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  • Method and device for bus address expansion

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Embodiment Construction

[0031] Hereinafter, taking the LPC bus as an example, the method and device for expanding the bus address of the present invention will be further described in detail. It should be noted that the bus address extension method and device of the present invention are not limited to the LPC bus, but also applicable to other types of buses. LPC (Low Pin Count) is a 33MHz 4 bit parallel bus protocol based on the Intel standard. This interface is used to replace the previous ISA bus protocol to connect South Bridge and Super I / O chips, FLASH BIOS, EC and other devices. The signal lines of the LPC bus have a total of 7 mandatory signals and 6 optional signals. The mandatory signals are LCLK, LRESET#, LFRAME#, LAD[3:0]. The optional signal distributions are LDRQ#, SERIRQ, CLKRUN#, LPME#, LPCPD#, LSMI#. Since the optional signals do not affect the function of interface communication, only the mandatory signals will be described in detail later. Among the mandatory signals, LCLK is th...

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Abstract

The invention discloses a method and device for bus address expansion. In the bus address expansion method of the invention, the step of sending data from the master device to the target expansion device includes: the master device sends bus data and address supplement based on the specified device address to the bus. signal; reconstruct the bus data and address supplementary signal to generate the bus data for the target expansion device; the expansion device receives the bus data for the target expansion device; the device for bus address expansion includes the address expansion device between the master device and the slave device. The present invention can solve the problem that the bus address cannot be covered due to the inability to increase the number of devices connected to the bus due to the limited bus address or the increase in the capacity of a single device connected to the bus. Cause the problem of incomplete bus address coverage, and solve the problem of insufficient corresponding device flags or device addresses due to the increase in the number of devices connected to the bus.

Description

technical field [0001] The present application relates to the field of computer technology, in particular to a method and device for bus address expansion. Background technique [0002] Bus (Bus) is a public communication trunk line for transmitting information between functional modules in a computer system. It is an electrical signal transmission wiring harness composed of various conductors. It is widely used in the central processing unit of the computing system, the information communication between the central processing unit and the external equipment, or the information communication between the external equipment and the external equipment. The bus can connect multiple devices together, and distinguish devices by different flag bits or addresses, such as figure 1 As shown, the master device Master is connected to multiple slave devices Device_0~Device_n through the bus, and the master device Master distinguishes devices by different flag bits or addresses. This gr...

Claims

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Application Information

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Patent Type & Authority Patents(China)
IPC IPC(8): G06F13/40G06F13/36
CPCG06F13/36G06F13/4018
Inventor 范里政陈才刘付东李振宇王兴珍
Owner PHYTIUM TECH CO LTD
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