Memory control method, memory storage device and memory control circuit unit

A technology for controlling circuits and storage devices, which is applied in the field of memory control methods, memory storage devices and memory control circuit units, and can solve problems such as spending more time

Pending Publication Date: 2021-02-09
PHISON ELECTRONICS
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  • Summary
  • Abstract
  • Description
  • Claims
  • Application Information

AI Technical Summary

Problems solved by technology

However, the problem with this mechanism is that if the data to be read does not exist in the buffer memory and / or the data read does not have errors (or only has a small number of errors), then every time the data is read, the Searching the buffer memory first will actually take extra reading time, and may even need to read data from the rewritable non-volatile memory module to decode after spending extra time searching the buffer memory, but it will cost more time to read data

Method used

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  • Memory control method, memory storage device and memory control circuit unit
  • Memory control method, memory storage device and memory control circuit unit
  • Memory control method, memory storage device and memory control circuit unit

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Embodiment Construction

[0031] Reference will now be made in detail to the exemplary embodiments of the present invention, examples of which are illustrated in the accompanying drawings. Wherever possible, the same reference numbers will be used in the drawings and description to refer to the same or like parts.

[0032] Generally speaking, a memory storage device (also called a memory storage system) includes a rewritable non-volatile memory module (rewritable non-volatile memory module) and a controller (also called a control circuit). Typically memory storage devices are used with a host system such that the host system can write data to or read data from the memory storage device.

[0033] figure 1 It is a schematic diagram showing a host system, a memory storage device and an input / output (I / O) device according to an exemplary embodiment of the present invention. figure 2 It is a schematic diagram showing a host system, a memory storage device and an I / O device according to another exemplary ...

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Abstract

The invention provides a memory control method, a memory storage device and a memory control circuit unit. The memory control method is used for the memory storage device. The method comprises the steps of reading first data from a first physical unit in response to a first reading instruction from a host system; performing a first decoding operation on the first data to obtain decoded data corresponding to the first data; storing decoded data corresponding to the first data to a buffer memory; reading second data from the first physical unit in response to a second read instruction from a host system; performing a second decoding operation on the second data; and in response to failure of the second decoding operation, searching for decoded data corresponding to the first data from the buffer memory in place of reading of the second data. Therefore, the data reading speed can be increased as much as possible while data decoding requirements are met.

Description

technical field [0001] The invention relates to a memory control technology, in particular to a memory control method, a memory storage device and a memory control circuit unit. Background technique [0002] Digital cameras, mobile phones, and MP3 players have grown rapidly in recent years, making consumers' demand for storage media also increase rapidly. Since the rewritable non-volatile memory module (for example, flash memory) has the characteristics of data non-volatility, power saving, small size, and no mechanical structure, it is very suitable for built-in Among the various portable multimedia devices listed above. [0003] Generally speaking, the data read from the rewritable non-volatile memory module may have errors. This error can be corrected by error checking circuitry. However, if error correction is performed on the read data every time the data is read, the overall read performance of the memory storage device will be degraded. In particular, for memory s...

Claims

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Application Information

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IPC IPC(8): G06F13/16G06F3/06
CPCG06F13/1673G06F3/0611G06F3/0656G06F3/0679
Inventor 赖加雄
Owner PHISON ELECTRONICS
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