Cache-based trace replay breakpoints using reserved tag field bits

Abstract

Performing breakpoint detection via a cache includes detecting an occurrence of a memory access and identifying whether any cache line of the cache matches an address associated with the memory access. When a cache line does match the address associated with the memory access no breakpoint was encountered. When no cache line matches the address associated with the memory access embodiments identify whether any cache line matches the address associated with the memory access when one or more flag bits are ignored. When a cache line does match the address associated with the memory access when the one or more flag bits are ignored, embodiment perform a check for whether a breakpoint was encountered. Otherwise, embodiments process a cache miss.

Description

Background technique [0001] When writing code during the development of a software application, developers typically spend a significant amount of time "debugging" the code to find runtime errors in the code. In doing so, developers can take several approaches to reproduce and localize source code defects (bugs), such as observing the behavior of the program based on different inputs, inserting debugging code (e.g., printing variable values, tracing branches of execution, etc. ), temporarily remove code sections, etc. Tracking down runtime errors to pinpoint code defects can consume a significant portion of application development time. [0002] Many types of debugging applications ("debuggers") have been developed to assist developers in the code debugging process. These tools enable developers to track, visualize and alter the execution of computer code. For example, a debugger may visualize the execution of code instructions, may present variable values ​​at various time...

AI Technical Summary

Problems solved by technology

However, instrumentation has the serious disadvantage of making a check for the occurrence of a breakpoint performed on every memory access, regardless of whether the memory access actually corresponds to a breakpoint.

While these solutions are an improvement over instrumentation for breakpoint detection, they can severely impact execution performance when a cache miss occurs (even if no breakpoint is hit regarding the cache miss), and also cause cache misses to occur more frequently than if the cache were not used for breakpoint detection (i.e. because they actively evicted cache lines that overlapped the memory address being monitored)

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