Three-dimensional memory and method for forming step region of three-dimensional memory

Abstract

The invention discloses a three-dimensional memory and a method for forming a step region of the three-dimensional memory. The three-dimensional memory comprises a substrate and a stack structure located on the substrate; the stack structure comprises a step area, and a measurement mark is formed at a first position on the surface of a step in the step area; the measurement mark is formed by etching the stack structure.

Description

technical field [0001] The invention relates to the technical field of semiconductors, in particular to a three-dimensional memory and a method for forming a step region of the three-dimensional memory. Background technique [0002] Memory is a memory device used to save information in modern information technology. With the continuous improvement of the demand for integration and data storage density of various electronic devices, it is increasingly difficult for ordinary two-dimensional memory devices to meet the requirements. In this case, three-dimensional (3D) memory emerges as the times require. [0003] Currently, a three-dimensional memory mainly includes a vertical channel layer and a horizontally stacked gate structure disposed outside the channel layer. The horizontally stacked gate structure generally has a step region (Stair Steps, SS), so that each layer of the gate is electrically connected to the vertical contact hole (Contact, CT) through the corresponding ...

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Problems solved by technology

[0004] However, since each step in the step area needs to be formed through multiple etching steps, the size and position of the mask layer in each etching will affect the final formation position of the step.

At present, it is often difficult to calculate the actual offset of the step through the measurement of the overlay (Overlay, OVL) of the photoresist layer and the measurement of the etching trim size (ETCH TRIM CD)

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