Memory circuit and memory repair method thereof

Abstract

Disclosed are a memory circuit and a memory repair method thereof. The memory circuit includes a first memory array and a second memory array. The first memory array and the second memory array are independent. The first memory array includes a plurality of general bits and the second memory array includes a plurality of spare bits. An address of defective bit in the first memory array is stored in the second memory array, and the memory circuit repairs the defective bit by one of the spare bits according to the address.

Description

technical field [0001] The invention relates to the field of memory circuits, in particular to a memory repair method for memory circuits. Background technique [0002] In a memory circuit, bad memory bits will be generated due to various non-ideal factors in the manufacturing process, so the traditional memory circuit 10 will use part of the internal space to set the first spare bit in addition to the general bit 12. bit 14 or second spare bit 16, as figure 1 As shown, when the memory circuit 10 is tested and found that there are bad bits in the general bits 12, the first spare bit 14 or the second spare bit 16 can be used to replace these bad bits, so as to achieve the effect of repairing the memory , thereby improving the manufacturing yield of the memory circuit 10 . [0003] However, the traditional memory patching method is to replace a whole row or a whole column of memory bits, so in addition to replacing bad bits, good bits in a row or a column are also replaced a...

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Problems solved by technology

[0003] However, the traditional memory repair method is to replace a whole row or a whole column of memory bits, so in addition to replacing bad bits, it will also replace good bits in a row or a column at the same time, resulting in waste

In addition, as the size of the memory circuit shrinks and the memory capacity increases, the density of the memory array increases, so the number of bad bits also increases, and the space requirements for setting spare rows or spare columns also increase. If the memory bits of the spare row or spare column are replaced, the additional area required is quite large

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