Chip, signal restoration device, signal adjustment method and signal restoration method

Abstract

The embodiment of the present application provides a chip, a signal recovery device, a signal adjustment method, and a signal recovery method. The gearbox module is used to adjust the first state signal of the first bit width generated by the functional module to a second state signal of the second bit width. The state signal of the second bit width that can be processed by the data coding and scrambling code module is obtained, and the third state signal obtained by encoding the second state signal and DC balance scrambling by the data coding and scrambling code module meets the transmission requirements of the high-speed transceiver module. The high-speed transceiver module of the chip outputs the third state signal externally, wherein the second bit width is greater than the first bit width, and the bandwidth of the high-speed transceiver module for outputting the third state signal is greater than the transmission bandwidth of the first state signal, so that the chip state can be realized complete output of the signal.

Description

technical field [0001] The present application relates to the field of electronic technology, in particular to a chip, a signal recovery device, a signal adjustment method and a signal recovery method. Background technique [0002] There will be a debugging process after the chip is returned to the chip and during normal use. Therefore, it is necessary to design the chip to be able to output specified information to detect the working status of the chip. The existing method is to output the status signal that needs to be collected to the Pin (pin) of the chip, and the Pin of the chip outputs the status signal, but the output speed of the Pin in the prior art is the fastest at about 100MHZ, and the output speed of the complex chip is about 100MHZ. The main frequency is generally above 1GHZ. For example, if a 100MHZ Pin is used to output a status signal of a 1GHZ main frequency chip, the chip can only output and observe 1 status signal every time the chip generates 10 status s...

AI Technical Summary

Problems solved by technology

The existing method is to output the status signal that needs to be collected to the Pin (pin) of the chip, and the Pin of the chip outputs the status signal, but the output speed of the Pin in the prior art is the fastest at about 100MHZ, and the output speed of the complex chip is about 100MHZ. The main frequency is generally above 1GHZ. For example, if a 100MHZ Pin is used to output a status signal of a 1GHZ main frequency chip, the chip can only output and observe 1 status signal every time the chip generates 10 status signals, that is, only Can output a status signal with a sampling rate of 1 / 10, but cannot output a complete GHZ-level status signal, resulting in the inability to fully detect the operating status of the chip

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