Standard unit discharge rate test classification method, device, equipment, program and medium

Abstract

The embodiment of the invention provides a standard unit discharge rate test classification method, device and equipment, a computer program product and a readable storage medium. The method provided by the embodiment of the invention comprises the following steps: acquiring a layout planning map, wherein the layout planning map comprises a plurality of layout blocks which are arranged in advance; obtaining a to-be-tested standard unit list, wherein the to-be-tested standard unit list comprises a plurality of to-be-tested standard units; for each to-be-tested standard unit in the to-be-tested standard unit list, determining the discharge rate of the to-be-tested standard unit in the layout planning graph; and according to the determined discharge rate of each to-be-tested standard unit, classifying the plurality of to-be-tested standard units, thereby rapidly screening out the standard unit which is most matched with the chip layout design, facilitating the optimization of the standard unit which is poor in matching, and improving the utilization rate of the layout space.

Description

technical field [0001] The present disclosure relates to the technical field of semiconductors, and more specifically, to a classification method, device, equipment, computer program product, and readable storage medium for standard unit discharge rate testing. Background technique [0002] As the level of chip manufacturing technology improves, manufacturers realize more and more circuit elements in smaller and smaller surface areas of silicon substrates, and integrated circuits contain millions of transistors on a single chip. The dominant method of developing integrated circuits today is to use standard cells during the development process. This standard cell design method prepares a variety of standard cells with prescribed logic functions in advance, arranges multiple standard cells on a semiconductor substrate, and combines these standard cells by connecting the standard cells using wiring according to user needs. The unit designs an integrated circuit that realizes a...

AI Technical Summary

Problems solved by technology

However, these classification methods only classify around the properties of standard cells, and cannot measure the matching degree between standard cells and chip layout design, and cannot quickly and accurately select standard cells that best match chip layout design.

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