Looking for breakthrough ideas for innovation challenges? Try Patsnap Eureka!

Semiconductor device

A semiconductor and substrate technology, applied in semiconductor devices, semiconductor/solid-state device parts, electric solid-state devices, etc., can solve the problem of low degree of freedom in layout

Inactive Publication Date: 2013-02-06
SOCIONEXT INC
View PDF2 Cites 0 Cited by
  • Summary
  • Abstract
  • Description
  • Claims
  • Application Information

AI Technical Summary

Problems solved by technology

That is, in the above-mentioned semiconductor device, since wiring cannot be routed inside it, there is a problem that the degree of freedom in the layout of the protruding electrodes 4 to be external connection terminals is low.

Method used

the structure of the environmentally friendly knitted fabric provided by the present invention; figure 2 Flow chart of the yarn wrapping machine for environmentally friendly knitted fabrics and storage devices; image 3 Is the parameter map of the yarn covering machine
View more

Image

Smart Image Click on the blue labels to locate them in the text.
Viewing Examples
Smart Image
  • Semiconductor device
  • Semiconductor device
  • Semiconductor device

Examples

Experimental program
Comparison scheme
Effect test

Embodiment 2

[0340] The semiconductor device 10A of the second embodiment is configured by mounting a plurality of semiconductor devices 11 on a stage member 80 to form a modular structure. In addition, the resin layer 13 is configured to seal the protruding electrode 12 up to the side of the semiconductor device 11 while leaving the tip portion sealed. In addition, the stage 80 is formed of a material (for example, copper or aluminum) with good heat dissipation.

[0341] In the semiconductor device 10A configured as described above, since a material with good heat dissipation is used as the stage 80 , high heat dissipation can be maintained even when a plurality of semiconductor devices 11 are mounted.

[0342] Furthermore, the semiconductor device 10B of Embodiment 3 is characterized in that: Figure 26 In the semiconductor device 10A, the bank portion 81 is formed on the outer peripheral side of the stage 80 . The height H2 ( Figure 27 , indicated by an arrow) is configured to be hi...

Embodiment 9

[0352] Figure 29 is an explanatory diagram for explaining the semiconductor manufacturing method of Embodiment 9, in Figure 29 in, for use with Figure 1 to Figure 9 The same configurations as those of the embodiments described in Embodiment 1 are given the same reference numerals and description thereof will be omitted.

[0353] In this embodiment, although it is the same as the above-mentioned embodiment, it is also characterized in that as the sealing resin used in the resin sealing process, a variety of sealing resins (2 in this embodiment) with different characteristics are used. type), however, in the above-mentioned embodiment 8, the resin layer 13A, 13B which is different from each other is laminated, but in the present embodiment, the resin layer 13B is disposed on the outer peripheral position of the substrate 16 Above, the structure in which the resin layer 13A is arranged at a position surrounded by the resin layer 13B (see Figure 29 (C)). Hereinafter, a met...

Embodiment 12

[0368] Figure 32 and Figure 33 It is an explanatory diagram of the manufacturing method of the semiconductor device of the twelfth embodiment. exist Figure 32 and Figure 33 in, for use with Figure 1 to Figure 9 The same configurations as those described in Embodiment 1 are assigned the same reference numerals and description thereof will be omitted.

[0369] The manufacturing method of this embodiment is characterized in that: in the sealing resin step, first, as in the previous embodiments, a resin layer 13 (the first resin layer 13) is formed on the surface of the substrate 16 on which the protruding electrodes 12 have been formed. layer), a second resin layer 17 is formed on the back surface of the substrate 16 . Below, use Figure 32 and Figure 33 A specific resin sealing process in this embodiment will be described.

[0370] Figure 32 (A)~ Figure 32 (B) shows the step of compression-molding the first resin layer 13 on the surface of the substrate 16 on w...

the structure of the environmentally friendly knitted fabric provided by the present invention; figure 2 Flow chart of the yarn wrapping machine for environmentally friendly knitted fabrics and storage devices; image 3 Is the parameter map of the yarn covering machine
Login to View More

PUM

No PUM Login to View More

Abstract

The invention provides a semiconductor device. The invention is characterized in that the invention is composed of a semiconductor device with a projecting electrode formed on the surface thereof; a resin bed which is formed on the surface of the semiconductor device and is sealed on the projecting electrode except the top end part thereof; the projecting electrode is provided with a core part and a conductive film formed on the surface of the projecting core part.

Description

[0001] This application is a divisional application of an invention patent application with an application date of July 10, 1997, an application number of 02126233.0, and an invention title of "semiconductor device and method for manufacturing a semiconductor device". technical field [0002] The present invention relates to a semiconductor device, a method for manufacturing the semiconductor device, a mold for manufacturing the semiconductor device, and the semiconductor device, and more particularly, to a semiconductor device having a chip-size package structure. Background technique [0003] In recent years, along with demands for miniaturization of electronic equipment and devices, miniaturization and high density of semiconductor devices are being sought. Therefore, the miniaturization of the semiconductor device has been achieved by making the shape of the semiconductor device as close as possible to the semiconductor device (chip). A semiconductor device of a so-calle...

Claims

the structure of the environmentally friendly knitted fabric provided by the present invention; figure 2 Flow chart of the yarn wrapping machine for environmentally friendly knitted fabrics and storage devices; image 3 Is the parameter map of the yarn covering machine
Login to View More

Application Information

Patent Timeline
no application Login to View More
Patent Type & Authority Patents(China)
IPC IPC(8): H01L23/485
CPCH01L24/97H01L2224/16225H01L2224/32225H01L2224/45144H01L2224/48091H01L2224/73204H01L2224/92125H01L2924/181H01L2924/351H01L2924/00014H01L2924/00
Inventor 深泽则雄川原登志实森冈宗知大泽满洋松木浩久小野寺正德河西纯一丸山茂幸竹中正司新间康弘佐久间正夫铃木义美
Owner SOCIONEXT INC
Who we serve
  • R&D Engineer
  • R&D Manager
  • IP Professional
Why Patsnap Eureka
  • Industry Leading Data Capabilities
  • Powerful AI technology
  • Patent DNA Extraction
Social media
Patsnap Eureka Blog
Learn More
PatSnap group products

Browse by: Latest US Patents, China's latest patents, Technical Efficacy Thesaurus, Application Domain, Technology Topic, Popular Technical Reports.

© 2024 PatSnap. All rights reserved.Legal|Privacy policy|Modern Slavery Act Transparency Statement|Sitemap|About US| Contact US: help@patsnap.com